ABI--251 
version 01
John Chow	1996.12

1.  Introduction
This document describes ABI routine interface with SW server, communication, communication protocal with FW, ABI routine interface with FW.

Notes: Because ZJ HW will not support event,trigger,trace..., and it only give me the list trace buffer information”, and by now I have not revieved event,trigger,trace...info. from Taiwan HW, so I can not define the ABI routine about that.
Every ABI routine later about event,trigger, trace has no meaning(except list trace buffer,it is from ZJ HW and has it’s valuable for reference.), They wait for Taiwan HW to decided.

2.  About Communication
RS232C ,  BAUD RATE:  57600 or 115200(Selected by user).

2.1 How to establish the communication 
a. User select baudrate 57600 or 115200
b. SW use the selecting baudrate to send “MICE251” to FW
  (FW switch the baudrate from 57600 to 115200 to wait for SW link)
c. SW repeat step b. until get the response(received ACK(0X06)) or time out(2 sec)
d. If SW receive ACK,the linking is ok.
e. If time out,SW will popup message box to let user decide the continue linking or end.

2.2 SW send stream to HW
a. SW send total command stream(including HEAD,CONTENT) to FW;
b. SW wait for ACK or NACK
c. If receive ACK, it is ok. and goto receive status
   If receive NACK or time out(**60 msec/per-char) repeat to step a.

2.3 SW recwive stream from FW
a. SW wait for FW to send stream HEAD
b. If receive HEAD and checksum ok then go to receive CONTENT.
   If checksum error or time out then goto step a.
c. Continue to receive CONTENT,
   If checksum ok then send ACK to FW.
   If checksum error or time out(**60 msec/per-char),then send NACK to FW,and goto step a.

EXPLAIN

 1.FORMAT of "HEAD"  :
	 
lead code ‘:’	length(low byte)	length(high byte)	checksum(not include lead code)	
      1 byte          1 byte             1 byte			1 byte
   checksum = ~(length(low byte) + length(high byte))+1

2.Format of "CONTENT" :
   	 
agrc & argv[]	checksum	
 (n-1) byte       1 byte
  n is the length defined in EAD”

3.Format of �agrc & argv[]”
   
command id or return status	len	data	 … … ….
Len and data	end code              (00)	checksum(not include lead code)	
 1 byte(command id) 1 byte len byte      ...	        1byte     	 1 byte
 2 byte(return status)

 4. ACK :  refers to byte 0x6

 5. NACK : refers to byte 0x15

3.struct and type define
/* define the command ID */
typedef enum {
   COMMAND_START,          /* 0  -- 0x0  */not supported
   GET_ID,                 /* 1  -- 0x1  */supported 
   CHECKSUM,               /* 2  -- 0x2  */supported
   CLR_EVENT,              /* 3  -- 0x3  */supported only by TaiWan
   CLR_TRIG,               /* 4  -- 0x4  */supported only by TaiWan
   COMPARE,                /* 5  -- 0x5  */supported
   COPY,                   /* 6  -- 0x6  */supported
   FUNCTION_TEST,          /* 7  -- 0x7  */not supported
   ESC_COMMAND,            /* 8  -- 0x8  */not supported
   FILL_COMMAND,           /* 9  -- 0x9  */supported
   GET_ALL_CO_REG,         /* 10 -- 0xa  */not supported
   GET_ALL_INTERNAL_REG,   /* 11 -- 0xb  */not supported
   GET_ALL_REG,            /* 12 -- 0xc  */supported
   GET_CO_COVERAGE,        /* 13 -- 0xd  */not supported
   GET_CO_REG,             /* 14 -- 0xe  */not supported
   GET_CONTROL,            /* 15 -- 0xf  */supported
   GET_DEPTH,              /* 16 -- 0x10 */supported 
   GET_EVENT,              /* 17 -- 0x11 */ wait for check
   GET_MAP,                /* 18 -- 0x12 */supported
   GET_MAP_SIZE,           /* 19 -- 0x13 */not supported
   GET_MODE,               /* 20 -- 0x14 */ not supported
   GET_READY,              /* 21 -- 0x15 */ not supported
   GET_REG,                /* 22 -- 0x16 */ supported
   GET_SIZE,               /* 23 -- 0x17 */ not supported
   GET_STAT,               /* 24 -- 0x18 */ not supported
   GET_SYNC,               /* 25 -- 0x19 */ not supported
   GET_VERIFY,             /* 26 -- 0x1a */ supported
   GET_WAIT,               /* 27 -- 0x1b */ not supported
   GO_COMMAND,             /* 28 -- 0x1c */ supported
   HALT,                   /* 29 -- 0x1d */ not supported
   INPUT,                  /* 30 -- 0x1e */not supported
   LIST_TRACE,             /* 31 -- 0x1f */wait for check
   OUTPUT,                 /* 32 -- 0x20 */ not supported
   READ_MEM_N,             /* 33 -- 0x21 */supported
   RESET,                  /* 34 -- 0x22 */supported
   SEARCH,                 /* 35 -- 0x23 */supported
   SET_TRACE_BUFF,         /* 36 -- 0x24 */wait for check
   SET_CONTROL,            /* 37 -- 0x25 */supported
   SET_CO_COVERAGE,        /* 38 -- 0x26 */ not supported
   SET_CO_REG,             /* 39 -- 0x27 */ not supported
   SET_EVENT,              /* 40 -- 0x28 */ wait for check
   SET_EX_BKPT,            /* 41 -- 0x29 */not supported
   SET_ID,                 /* 42 -- 0x2a */supported
   SET_MEM_N,              /* 43 -- 0x2b */supported
   SET_MAP,                /* 44 -- 0x2c */supported
   SET_MODE,               /* 45 -- 0x2d */ not supported
   SET_REG,                /* 46 -- 0x2e */ supported
   SET_READY,              /* 47 -- 0x2f */ not supported
   SET_SIZE,               /* 48 -- 0x20 */ not supported
   SET_SYNC,               /* 49 -- 0x31 */ not supported
   SET_TRACE_BREAK,        /* 50 -- 0x32 */ not supported
   SET_TRIG,               /* 51 -- 0x33 */ wait for check
   SET_TIMER_COUNTER,      /* 52 -- 0x34 */ not supported
   SET_VERIFY,             /* 53 -- 0x35 */ supported
   SET_WAIT,               /* 54 -- 0x36 */ not supported
   STEP,                   /* 55 -- 0x37 */ not supported
   STEP_ONE,               /* 56 -- 0x38 */ supported
   TEST,                   /* 57 -- 0x39 */ supported
   SET_EXT_EVENT,          /* 58 -- 0x3a */ wait for check
   SET_ALL_EVENT,          /* 59 -- 0x3b */ wait for check
   SET_TIMER_REG,          /* 60 -- 0x3c */ supported
   GET_CPU_STATUS,         /* 61 -- 0x3d */ supported
   ABORT,                  /* 62 -- 0x3e */ supported
   GET_TRIG,               /* 63 -- 0x3f */ wait for check
   GET_LAST_BUFF,          /* 64 -- 0x40 */ wait for check
   DIAGNOSTIC,             /* 65 -- 0x41 */ wait for check

/*   MP251 => new command id  */  /* gene */
CONFIG_CPU = 80,	/* 80 -- 0x50 */
GET_CONFIG,	/* 81 -- 0x51 */
GET_FW_SUPPORT,	/* 82 -- 0x52 */
CLR_BP,	/* 83 -- 0x53 */
SET_PORT,	/* 84 -- 0x54 */
FW_INIT,	/* 85 -- 0x55 */
STEP_OVER,	/* 86 -- 0x56 */
EREASE_FLASH,	/* 87 -- 0x57 */
PROG_FLASH,	/* 88 -- 0x58 */
SWITCH_FLASH,	/* 89 -- 0x59 */
FILL_FLASH_BLANK,	/* 90 -- 0x5A */
SET_DECODE_RAM,	/* 91 -- 0x5B */
GET_HW_MODE,	/* 92 -- 0x5C */
SELECT_BAUD,	/* 93 -- 0x5D */

/*   MTAT2 => new command id  */
SET_TRIG_OUT_ACT = 100, /* 100 -- 0x64 */
TRACE_ACTION,           /* 101 -- 0x65 */
READ_STAMP,             /* 102 -- 0x66 */
SPA_SET_RANGE,          /* 103 -- 0x67 */
SPA_CLEAR_RANGE,        /* 104 -- 0x68 */
SPA_GET_MA_INFO,        /* 105 -- 0x69 */
SPA_GET_TA_INFO,        /* 106 -- 0x6A */
SPA_GET_CC_INFO,        /* 107 -- 0x6B */
SPA_CLOSE,              /* 108 -- 0x6C */
SPA_SETBKPT,            /* 109 -- 0x6D */
SPA_OPEN,               /* 110 -- 0x6E */
R_FLUSH_ROM,            /* 111 -- 0x6F */
W_FLUSH_ROM,            /* 112 -- 0x70 */
SET_TRACE_OFF_FULL,     /* 113 -- 0x71 */

   MAX_COMMAND          /* All new command must add before this command. */
} COMMAND_ID;

Pay attention here:
Following is defined for the abi command return status, FW engineer can return
any value in the list and SW engineer must prepare for every value in the list.
#define ICE_OK                        0    /* Normal return */
#define ICE_MICE_HALT              ( -1)   /* Target CPU halted */
#define ICE_MEM_GUARD              ( -2)   /* Access the guarded memory */
#define ICE_MEM_PROTECT            ( -3)   /* Access the protected memory */
#define ICE_ERROR_READ             ( -4)   /* Memory read failure */
#define ICE_ERROR_WRITE            ( -5)   /* Memory write failure */
#define ICE_STEP_ERROR             ( -6)   /* Target cnnot step */
#define ICE_NO_DIFF                ( -7)   /* No difference in memory compare*/
#define ICE_NO_FOUND               ( -8)   /* Not found in memory search */
#define ICE_BREAK                  ( -9)   /* Break on memory access */
#define ICE_BREAK_I                (-10)   /* Break on instruction fetch */
#define ICE_BAD_REG                 (-11)   /* Bad register number encountered */
#define ICE_BAD_IN                  (-12)   /* Error encountered on user input */
#define ICE_HALT_USER              (-13)   /* user pressed ^C */
#define ICE_ERROR_COM              (-14)   /* communication error */
#define ICE_ERROR_MICE             (-15)   /* linking incorrect MICE model */
#define ICE_MICE_LIMIT             (-16)   /* MICE limitation */
#define ICE_BUS_REQUEST            (-17)   /* Bus request */
#define ICE_BAD_FRAME              (-18)   /* invalid frame number */
#define ICE_ERROR_BOUN             (-19)   /* error map boundary */
#define ICE_MAP_FAIL               (-20)   /* memory map fail */
#define ICE_ABS_OVERFLOW           (-21)   /* abs address overflow */
#define ICE_TEST_FAIL              (-22)   /* test failure */
#define ICE_CPU_RUN                (-23)   /* CPU free running */
#define ICE_BROKE                  (-24)   /* CPU stop */
#define ICE_NOT_READY              (-25)   /* target is not ready */
#define ICE_COMMAND_ERROR          (-26)   /*  */
#define ICE_TIME_OUT               (-27)   /*  */
#define ICE_NO_TRACE_MODULE        (-28)   /*  */
#define ICE_BKPT1_HALT             (-29)   /*  */
#define ICE_BKPT2_HALT             (-30)   /*  */
#define ICE_VIOL_HALT              (-31)   /*  */
#define ICE_RBW_HALT               (-32)   /*  */
#define ICE_TRIG_HALT              (-33)   /*  */
#define ICE_LINK_MICE_FAIL         (-34)   /*  */
#define ICE_WARN_START             (-35)   /*  */
#define ICE_BANK_FULL              (-36)
#define ICE_ADDR_RANGE_OVERFLOW    (-37)
#define ICE_ATTRIBUTE_MISMATCH     (-38)
#define ICE_BANK_MISMATCH          (-39)
#define ICE_SPACE_MISMATCH         (-40)
#define ICE_ADDR_MISMATCH          (-41)
#define ICE_NO_VCC                 (-42)
#define ICE_USER_CC                (-43)
#define ICE_TARGET_RESET           (-44)
#define ICE_NO_EMM                 (-45)
#define ICE_CNT_ERROR              (-46)
#define ICE_TIMER_ERROR            (-47)
#define ICE_EVENT_FULL             (-48)
#define ICE_BUFFER_EMPTY           (-49)
#define ICE_EMM_SET_ERROR          (-50)
#define ICE_EP_PENDING             (-51)
#define ICE_REC_TIME_OUT           (-52)
#define ICE_INVALID_CPU            (-53)
#define ICE_MCE16A_FAIL            (-54)
#define ICE_EMM_FAIL               (-55)
#define ICE_TRACE_BOARD_FAIL       (-56)
#define ICE_COV_RBW_FAIL           (-57)
#define ICE_CPU_FLY                (-58)
#define ICE_INVALID_FLY_COMMAND    (-59)
#define ICE_INVALID_FIRMWARE       (-60)
#define ICE_FLASH_EREASE_FAIL	  (-61)
#define ICE_FLASH_PROG_FAIL	  (-62)
#define ICE_FLASH_SWITCH_FAIL	  (-63)
#define ICE_NO_MATCH	  		  (-64)

/**********************************************/
/****  added error number for trace board  ****/
/**********************************************/
#define ERR_PIPE_DONE              (-65)
#define ERR_P4_DONE                (-66)
#define ERR_MN_DONE                (-67)
#define ERR_MN_CONFIG              (-68)
#define ERR_CODECOVERID            (-69)
#define ERR_UNKNOW_TBN             (-70)
#define ERR_LIST_MODE              (-71)
#define ERR_TRIG                   (-72)
#define INVALID_RANGE_NO           (-73) // invalid spa range no
#define CMPRAM_FAIL                (-74)

ZJ/SW : Pay much attention here, it�s changed entirely.		
typedef struct{
   U32 pos;
   U16 space;
}ADDR;

typedef struct{
	U32 pos;  // ADDR_TYPE
   	U16 space;
	U32 data;
}RET_ADDR;

//address type (for pos)
typedef enum {
        MEM_UNDEFINED   = 0,   //for error or other using
        MEM_16MB = 1,          //24 bits linear address space
        MEM_REGISTER = 5,      //251 REGISTER FILE SPACE
        MEM_SFR = 7,		 //251 SFR SPACE
}ADDR_TYPE;

//defined the register id seq
typedef enum {
/*	0	1	2	3	4	5	6	7  */
	R_PC,	R_ACC,	R_B,	R_PSW,	R_PSW1	R_SP,	R_SPH,	R_DPL,	R_DPH,	R_DPXL,	R_PCON,	R_IE0,	R_IPH0,	R_IPL0,	R_WCON	R_P0,	R_P1,	R_P2,	R_P3,	R_SCON,	R_SBUF,	R_SADEN,	R_SADDR,	R_TL0,	R_TH0,	R_TL1,	R_TH1,	R_TL2,	R_TH2,	R_TCON,	R_TMOD,	R_T2CON,	R_T2MOD,	R_RCAP2L,	R_RCAP2H,	R_WDTRST,	R_CCON,	R_CMOD,	R_CCAPM0,	R_CCAPM1,	R_CCAPM2,	R_CCAPM3,	R_CCAPM4,	R_CL,R_CH,	R_CCAP0L,	R_CCAP1L,	R_CCAP2L,	R_CCAP3L,	R_CCAP3L,	R_CCAP4L,	R_CCAP0H,	R_CCAP1H,	R_CCAP2H,	R_CCAP3H,	R_CCAP4H,
	MAX_CPU_REG_NO
}CPU_REGISTER;

typedef enum {
/*	0	1	2	3	4	5	6	7  */
	NR_0,	NR_1,	NR_2,	NR_3,	NR_4	NR_5,	NR_6,	NR_7,
	NR_8,	NR_9,	NR_10,	NR_11,	NR_12,	NR_13,	NR_14	NR_15,
	NR_WR16,	NR_WR18,	NR_WR20,	NR_WR22,	NR_WR24,	NR_WR26,	NR_WR28,	NR_WR30,
	NR_DR0,	NR_DR4,	NR_DR56,	NR_DR60,
	MAX_NORMAL_REG_NO
}NORMAL_REGISTER;

**//defined for filter qualify
	typedef struct {
				BYTE filterFlag;
				BYTE addrType;
				BYTE dataType;
				DWORD addrValue1;//MAX 24 BIT
				DWORD addrValue2;
				WORD dataValue1;//MAX 16 BIT
				WORD dataValue2;
				WORD statusValue;
				 } QUALIFY_INFO;

	filterFlag	:	setmode	: 0 filter off, 1 filter on
	 
	addrType	:	addrType
			0	all wide-card(not use)	
			1	single address
			2	bit wild-card
			3	range
			4 	not in range	//reserved
			
	dataType	:	dataType
			0	all wide-card	
			1	single address
			2	bit wide-card
			3	range		//reserved
			4 	not in range	//reserved
	adddrValue1	:adddrValue1	(addrType=0: no use
					addrType =1: single value
					addrType =2: bit value
					**addrType =3:  range value1
					addrType =4:  invert range value1  // reserved
					)

	addrValue2 :    addrValue2	(addrType=0: no use
					addrType =1: no use
					addrType =2: bit value mask. 
						**bit = 1 compare, bit = 0 don�t care
						if masked, the corresponding value of addrValue1
						is used.
					addrType =3:  range value2
					addrType =4:  invert range value2 // reserved
					)

	dataValue1:	dataValue1	(dataType=0: no use
					dataType =1: single value
					dataType =2: bit value
					dataType =3:  range value1	// reserved
					dataType =4:  invert range value1  // reserved
					)

	dataValue2:	dataValue2	(dataType =0: no use
					dataType =1: no use
					dataType =2: bit value mask.
						 **bit = 1 compare, bit = 0 don�t care
					if masked, the corresponding value of addrValue1
					is used.
					dataType =3:  range value2	// reserved
					dataType =4:  invert range value2  // reserved
					)
	**statusValue:	statusValue	
		//bit 0 : ALE
		//bit 1 : PSEN
		//bit 2 : READ
		//bit 3 : WRITE
		//bit 4 : CODE/DATA
		//bit 5 : 8BITMODE/16BITMODE
		//bit 6 : FLASH
		//bit 7 : I/O READ
			//bit 8 : I/O WRITE
			//bit 9 : POWER DOWN
			//bit 10 : IDEL MODE
			//bit 11 : BUS IDLE MODE

**
//defined for trace info.
typedef struct tracerec{
	S32 frameNo;	// frame number is not content of F/W trace data
	U32 addr;
	U32 data;
	U8 tbit;	// external trace bit
	U16 stat;
	U32 tport;	// trace port data
	U32 tstamp;	// byte 0-3 of time stamp
	U8 tstampMSB;	// byte 4 of time stamp
	U8 evtMatch;
	U8 seqLevel; 
	} TRACE_INFO;
// TRACE_INFO field order and size are fixed.
// Content of trace data from F/W is field addr to field seqLevel.
**
//defined for cpu id 
#define CPU_80C251SA	0x00
#define CPU_80C251SB	0x01
#define CPU_80C251SP	0x02
#define CPU_80C251SQ	0x03
#define CPU_83C251SA	0x10
#define CPU_83C251SB	0x11
#define CPU_83C251SP	0x12
#define CPU_83C251SQ	0x13
// high nible : 0 for 80C251, 1 for 83C251
// low nible : :0 for SA, 1 for SB, 2 for SP, 3 for SQ

//defined for map settings
typedef enum
	{
		MAP_ERW = 0x0,	// external read/write
		MAP_ORW = 0x1,	// overlay read/write
		MAP_ER = 0x2,	// external read only	
		MAP_OR = 0x3,	// overlay read only
		MAP_GUARD		// guard
	} MAP_ATTR;

typedef struct {
   ADDR addr1;
   ADDR addr2;
   U16 attr;
}MAP_INFO;

//defined for trace
typedef struct {
    U32 startFrame;
    U32 endFrame;
}BUFFER_DEPTH;
//defined for go command
**
enum {
   NORMAL_RUN = 0,FREE_RUN,FLY_RUN,MONITOR_RUN,TEST_RUN,
   SPA_MA_RUN, SPA_TA_RUN, SPA_CC_RUN,  // special running mode for SPA
}RUN_MODE;

4.  ABI Routines

This section describes all ABI routines which are called by the kernel of the debugger. All the ABI routines are talking with emulator via emulator's command protocol and placeing the result in calling parameters.

This section describes all ABI routines in alphabetical order.

The format of each routine is described below.
Syntax		is the calling convention of the routine.
Description	is the explanation of the routine.
Parameter		is the input and output parameters description.
Return Value	is the return status of emulator status after the routine is returned.
Remark	for all  memory commands, while error happened as NOT_READY or 	ERROR_WRITE, the address where error encountered will be stored in 	ret_addr1 and ret_addr2. the ret_addr2 used by emuSetMemN, emuSetMem, emuCopy and emuCompare function only.

**4. 1	emuDiagnosticFunction -- diagnostic
Syntax
	STATUS DiagnosticFunction(DIAG_ID diagID,U32 *retVal)
//wait for check
Description
	Diagnose MICEpack hardware. If the result isOK, it usually returns 0; otherwise return the error number(>0). User may refer to the error number in the menual. The testing sequence must follow the steps listed below.  During INITIAL_TEST, if the bit-4 of the returned value equals to  0, it means that MTAT board doesn't exist, then the testing items from PROGRAM_XLX to MCE_CONNECT_TEST are ignored. After all testings are completed, END_DIAG has to be issued.

Parameter
	diagID
HW engineer: pay attention here, please change the diagnostic id , otherwise it is
		considered as the following.
		
		INITIAL_TEST			Test MCE16B 8255, download 4003 and CP data 							memory.
						bit 1 equals 1 :MCE16B 8255 error.
						bit 2 equals 1 download 4003 error.
						bit 3 equals 1 CP data memory error.
						bit 4 equals 1 MTAT board exists.
		MCE_OPEN_SHORT_TEST	Test MCE16B open-short
		MCE_PULL_HIGH_TEST	Test MCE16B pull high
		MCE_MAP_TEST		Test map control RAM.
		MCE_MEMORY_TEST		Test EMM.
		SEQ_RAM_TEST		Test sequence RAM of state machine.
		MCE_CONNECT_TEST		Test MCE16B and MTAT board connecting.
		END_DIAG			End test 

/* define the command ID of the Michelle firmware function */
typedef enum {
   COMMAND_START,          /* 0  -- 0x00 */
   GET_ID,                  /* 1  -- 0x1  */ // special command, must place 1st.
   INITIAL_TEST,           /* 2  -- 0x02 */
   MCE_OPEN_SHORT_TEST,    /* 3  -- 0x03 */
   MCE_PULL_HIGH_TEST,     /* 4  -- 0x04 */
   MCE_MAP_TEST,           /* 5  -- 0x05 */
   MCE_MEMORY_TEST,        /* 6  -- 0x06 */
   TEST_BC_RDATA_BUS,      /* 7  -- 0x07 */
   TEST_BC_SDATA_BUS,      /* 8  -- 0x08 */
   TEST_BC_TDATA_BUS,      /* 9  -- 0x09 */
   TEST_BC_UDATA_BUS,      /* 10 -- 0x0A */
   TEST_BC_VDATA_BUS,      /* 11 -- 0x0B */
   TEST_BC_WDATA_BUS,      /* 12 -- 0x0C */
   TEST_BC_RADDR_BUS,      /* 13 -- 0x0D */
   TEST_BC_SADDR_BUS,      /* 14 -- 0x0E */
   TEST_BC_TADDR_BUS,      /* 15 -- 0x0F */
   TEST_BC_UADDR_BUS,      /* 16 -- 0x10 */
   TEST_BC_VADDR_BUS,      /* 17 -- 0x11 */
   TEST_BC_WADDR_BUS,      /* 18 -- 0x12 */
   TEST_TB_RSDATA_BUS,     /* 19 -- 0x13 */
   TEST_TB_TUDATA_BUS,     /* 20 -- 0x14 */
   TEST_TB_TPDATA_BUS,     /* 21 -- 0x15 */
   TEST_TB_VWDATA_BUS,     /* 22 -- 0x16 */
   TEST_TB_TSDATA_BUS,     /* 23 -- 0x17 */
   TEST_TB_EVDATA_BUS,     /* 24 -- 0x18 */
   TEST_TB_RSADDR_BUS,     /* 25 -- 0x19 */
   TEST_TB_TUADDR_BUS,     /* 26 -- 0x1A */
   TEST_TB_TPADDR_BUS,     /* 27 -- 0x1B */
   TEST_TB_VWADDR_BUS,     /* 28 -- 0x1C */
   TEST_TB_TSADDR_BUS,     /* 29 -- 0x1D */
   TEST_TB_EVADDR_BUS,     /* 30 -- 0x1E */
   TEST_SEQ_RAM,           /* 31 -- 0x1F */
   MCE_CONNECT_TEST,       /* 32 -- 0x20 */  // not support
   REPEAT_DIAG,            /* All new command must add before this command. */
   END_DIAG                /* All new command must add before this command. */
} COMMAND_ID;

Return Value	
	ICE_OK			Normal return
	ICE_NO_EMM			No emulator memory
	> 0 value			Diagnostic error.
	ICE_REC_TIME_OUT		Communication error
ICE_TRACEBOARD_FAIL	Trace board test error
following is only for FW:
COMMAND ID = DIAGNOSTIC(0x41)
INPUT SEQ : diagID(1 bytes)
OUTPUT SEQ : 

	If mtat-II trace board test fail, F/W will return a non-zero U32 value.
	Otherwise, return 0;

4. 2	emuAbort -- Stop target CPU
Syntax
	STATUS emuAbort(VOID)
Description
	Stops target CPU while CPU is running.

Parameter
	None

Return Value	
	ICE_OK			Normal return
	ICE_BUS_REQUEST	Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET	The signal of tagert reset pin is low
	ICE_NO_VCC		No Target Vcc
	ICE_REC_TIME_OUT	Communication error

following is only for FW:
COMMAND ID = ABORT(0x3e)
INPUT SEQ :
OUTPUT SEQ : 

4. 3	emuChecksum -- Calculate checksum of the memory block
Syntax
	STATUS emuChecksum(ADDR addr, U32 len, U16 *n,RET_ADDR* retAddr)

Description
	Calculate checksum of the memory starting from addr1 to total length of len.

Parameter
	addr		start address of checksum
	len		length of checksum
	*n		checksum
	retAddr	the error address if ICE_NOT_READY

Return Value	
	ICE_OK			Normal return
	ICE_BUS_REQUEST	Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET	The signal of tagert reset pin is low
	ICE_NO_VCC		No Target Vcc
	ICE_REC_TIME_OUT	Communication error

following is only for FW:
COMMAND ID = CHECKSUM(0x2)
INPUT SEQ : addr,len, 
OUTPUT SEQ :  n,retAddr(in any situation,this value must be returned)

**4. 4	emuClrEvent -- Clear event setting  //only supported by TaiWan FW
//wait for check
Syntax		
	STATUS emuClrEvent(U16 evId)

Description	
	Clear setting of one or all events (bus breakpoint, external trigger or execution event). 

Parameter
	evId	event ID : 	0: 		clear all event
				1 - 8 	bus event ID
**				9		external trigger //not used in MTAT-II
				10 - 11	execution breakpoint ID //not supported
				0		all bus events , execution breakpoints and external trigger

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = CLR_EVENT(0x3)
INPUT SEQ : evId
OUTPUT SEQ :  

4. 5	emuClrTrig -- Clear trigger
//wait for check
Syntax
	STATUS emuClrTrig(U16 triggerLevelNo)

Description	
	Clear one or all trigger levels (levelNo=0)

Parameter
	levelNo	trigger level ID : 	1-4	trigger level ID
							0	all trigger levels

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error

following is only for FW:
COMMAND ID = CLR_TRIG(0x4)
INPUT SEQ : triggerLevelNo
OUTPUT SEQ :  

4. 6	emuCompare -- Compare two memory blocks.
Syntax
	STATUS emuCompare(ADDR addr1, U32 len, ADDR addr2, RET_ADDR *findAddr1, RET_ADDR *findAddr2)

Description	
	Compare two memory blocks. Return the locations and contents when difference found.

Parameter
	addr1		the start address of first block.
	len		the address range of the block.
	addr2		the start address of second block.
	findAddr1	the first location of difference in first block.if ICE_OK
	findAaddr2	the first location of difference in second block.//reserved,no use

Return Value	
	ICE_OK			have difference.
	ICE_NO_DIFF		Two memory blocks are the same
	ICE_BUS_REQUEST	Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET	The signal of tagert reset pin is low
	ICE_NO_VCC		No Target Vcc
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = COMPARE(0x5)
INPUT SEQ : addr1,len,addr2 
OUTPUT SEQ : findAddr1(in any situation,this value must be returned)
         	 findAddr2(in any situation,this value must be returned)

4. 7	emuCopy -- Copy a memory block to another block.

Syntax
	STATUS emuCopy(ADDR addr1, U32 len, ADDR addr2,RET_ADDR* addrRet1,
			 RET_ADDR* addrRet2)

Description
	Copy a memory block to another block. When addr1is equal to addr2, target memory is copied to emulation memory.

Parameter
	addr1		the start address of first block.
	len		the address range of block.
	addr2		the start address of second block.
	addrRet	the error address if ICE_ERROR_WRITE, ICE_NOT_READY
Return Value	
	ICE_OK			Normal return.
	ICE_ERROR_WRITE	memory write failue
	ICE_BUS_REQUEST	Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET	The signal of tagert reset pin is low
	ICE_NO_VCC		No Target Vcc
	ICE_ERROR_WRITE	Memory write failure.
	ICE_MEM_GUARD		Write guard memory.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = COPY(0x6)
INPUT SEQ : addr1,len,adr2
OUTPUT SEQ :   addrRet (in any situation,this value must be returned)

4. 8	emuDiagnostic -- start diagnostic   
	//wait for check later
Syntax
	STATUS emuDiagnostic(VOID)

Description
	Reset MICEpack and ready to diagnostic..

Parameter
	None

Return Value	
	ICE_OK			Normal return
	ICE_REC_TIME_OUT		Communication error

4. 9	emuFill -- Fill a memory range with a specified pattern.
Syntax
	STATUS emuFill(ADDR addr, U32 len, U16 patternLen, U8 *buff,
			     RET_ADDR* retAddr)

Description	
	Fill a memory range with a specified pattern from buffer (buff).

Parameter
	addr	start address of filled memory.
	len	length of filled memory.
	patternLen	data pattern length.
	buff	array of data pattern.
	retAddr	error address if ICE_ERROR_WRITE, ICE_MEM_GUARD
		ICE_NOT_READY
Return Value	
	ICE_OK			Normal return.
	ICE_ERROR_WRITE		Memory write failure.
ICE_MEM_GUARD		Write guard memory.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = FILL_COMMAND(0x9)
INPUT SEQ : addr1,len, patternLen,buff(patternLen bytes)
OUTPUT SEQ : addrRet (in any situation,this value must be returned)

4.10	emuGetAccessSize -- Get Bus Access Size  
	//not supported

Syntax		
	STATUS emuGetAccessSize(U16 *sizeFlag)

Description	
	Get the access size of the emulator bus.

Parameter
	sizeFlag	0 : :Byte
			1 : Word

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

4.13	emuGetAllReg -- Get all CPU registers.
Syntax		
	STATUS emuGetAllReg(U32 *cpuReg)

Description	
	Read all CPU registers.

Parameter
Taiwan FW: pay attention here, we have changed �U16 *cpuReg” to �U32 *cpuReg”
cpuReg	array of CPU registers(please refer to);
Return Value	
	ICE_OK			Normal return.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = GET_ALL_REG(0xc)
INPUT SEQ : 
OUTPUT SEQ : cpuReg(sizeof(U32)*(register num) bytes)
appendix: register num and id seq is defined in struct and data section

4.14	emuGetAllTrig -- Get all trigger level settings  //supported only by TaiWan
//wait for check
Syntax
	STATUS emuGetAllTrig(TRIGGER *trig_record);

Description
	Get all current trigger level settings.

Parameter
	trig_record	must be declared as TRIGGER trig_record[4].

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = GET_TRIG(0x3f)
INPUT SEQ : 
OUTPUT SEQ : trig_record[4]

**4.15 emuGetControl -- Get control signals 
Syntax
	void EmuGetControl(U8 id,U8 *value)

Description
	Get the control signals.

Parameter
	id : signal id => 0 for reset, 1 for EA
	value	: signal value => 0:disable 1:enable
	
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = GET_CONTROL(0xf)
INPUT SEQ : 
OUTPUT SEQ : signals

4.18	emuGetCpuStatus -- Check Target CPU status 

Syntax		
	STATUS emuGetCpuStatus(U32 *cpuStatus)
//Taiwan FW,please pay attention here, this routine is changed.
Description	
	Get current cpu status

Parameter
	cpuStatus	 the returned value represented CPU status, 	
					bit0	0:	verify off
						1:	verify on
					bit1	0:	Target Vcc Low.
						1:	Target Vcc High.
					bit2	0:	Target EA Low
						1:	Target EA High
					bit3	0:	trace off
						1:	trace on
					bit 4	0:	EP stopped
						1:	EP running
					bit5 	0:	Trace is not running
						1:	Trace is running
					bit6-31: 	reserved

Return Value	
	ICE_OK			target CPU is running.
	ICE_CPU_FLY		target CPU is flying.
	ICE_BROKE			target CPU is stopped.
	ICE_EP_PENDING		target CPU is pending that wait SSI.
	ICE_TRIG_HALT		Program broke at Trigger hit.
	ICE_BKPT1_HALT		Program broke at an execution breakpoint 1.
	ICE_BKPT2_HALT		Program broke at an execution breakpoint 2..
	ICE_RBW_HALT		Program broke at read-before-write.
	ICE_BUS_REQUEST	Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET	The signal of tagert reset pin is low
	ICE_NO_VCC		No Target Vcc
	ICE_TIME_OUT		EP error.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = GET_CPU_STATUS(0x3d)
INPUT SEQ : 
OUTPUT SEQ : cpuStatus

**4.19	emuGetEvent -- Get all events setting.
	//wait for check
Syntax
	VOID emuGetEvent(BUS_EVENT *event_record, U16 *ext_record);
Description
	Get all event settings and timer/counter of trigger; events include bus events, execution breakpoints and external trigger.

Parameter
	event_record	8 bus events
	ext_record	external trigger

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

**4.20	emuGetID -- Get CPU type and firmware version.
Syntax
	void EmuGetID(U8 *ID_Info)

Description
	Get the CPU type, firmware version and hardware status. 

Parameter
	ID_Info	ID_Info[0..1]	CPU type defined in data section
			ID_Info[2]	firmware version  Major version
			ID_Inf0[3]	firmware version   Minor version
			ID_Info[4]	MICEPack hardware initial status. zero means OK, 
					if the value is not zero,each bit has following meanings :
					bit 0 :TRACE_HARDWARE_ERROR,
					bit 1 : MC16A_HARDWARE_ERROR
					bit 2 : NO_TARGET_VCC
					bit 3 : EMM_CONTROL_RAM_ERROR
					**bit 4: :TRACE_EXIST
				//reserved

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = GET_ID(0x1)
INPUT SEQ : 
OUTPUT SEQ : ID_Info(5 bytes)

4.21	emuGetMap -- Get the map setting of the emulation memory.

Syntax
	STATUS emuGetMap(ADDR addrStart,ADDR addrEnd,MAP_INFO *mapData)

Description
	Get current emulation memory setting. 

Parameter
addrStart	get map start
addrEnd	get map end
mapData	mapping data, including start address, end address and attribute. "mapData" will terminate with 0xffffffff.
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
Remark :
	Attribute is defined at EmuSetMap().
following is only for FW:
COMMAND ID = GET_MAP(0x12)
INPUT SEQ : addrStart, addrEnd
OUTPUT SEQ : mapData(sizeof(MAP_INFO)*n bytes)

4.22	emuGetMapSize -- Get the size of the emulation memory.
//not supported
Syntax
STATUS emuGetMapSize(U32 *emmSize)

Description
Get current emulation memory size 

Parameter
	emmSize	emulation memory size.(unit : byte)

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

4.23	emuGetMemN -- Read N bytes memory from MICEPack

Syntax		
	STATUS emuGetMemN(ADDR addr, U16 len ,U8 *buff,RET_ADDR* retAddr)

Description	
	Read a chunk of memory from location addr.

Parameter
	addr		the start address of data to read.
	len		the length of data.//the len <=255
	buff		the buffer for storing data.
	retAddr	error address,if ICE_ERROR_READ	, ICE_NOT_READY	
Return Value	
	ICE_OK				Normal return.
	ICE_ERROR_READ		Memory read error
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = READ_MEM_N(0x21)
INPUT SEQ : addr,len
OUTPUT SEQ : buff (len bytes), retAddr(in any situation,this value must be returned)

**4.25	emuGetReady -- Get READY signal 

Syntax		
	STATUS emuGetReady(U16 *readyFlag)

Description	
	Get the READY signal .
	
Parameter
	readyFlag	0 : ready internal
			1 : ready external
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

4.26	emuGetReg -- Get register

Syntax		
	STATUS EmuGetReg(REG_MODE regMode, S16 regId,U32 *content)

Description	
	Read a special CPU register.

Parameter
	regMode	CPU register, internal register or math processor register. //reserved
	regId		register ID
	content		register value.

Return Value	
	ICE_OK			Normal return.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = GET_REG(0x16)
INPUT SEQ : regMode(2 bytes), regId
OUTPUT SEQ : content

**4.27	emuGetSync -- Get synchronization setting 

Syntax
	STATUS emuGetSync(U16 *sync)

Description
	Get synchronization under multi-emulation configuration.

Parameter
	sync	 Bit-0  is the status of Input Sync, 1=ON and 0=OFF.
		 Bit-1  is the status of Output Sync, 1=ON and 0=OFF.

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

4.28	emuGetTraceDepth -- Get start/end frame number of a designated trace buffer

Syntax
//wait for check
	STATUS  emuGetTraceDepth(U16 bufID,BUFFER_DEPTH *traceDepth)

Description
	Get two frame numbers from a designated trace buffer (bufID) among "active" trace buffers. 

Parameter
	bufID		trace buffer number //reserved
	traceDepth	start and end frame numbers

Return Value	
	ICE_OK			Normal return.
	ICE_BUFFER_EMPTY		No trace data.
	ICE_REC_TIME_OUT		Communication error

following is only for FW:
COMMAND ID = GET_DEPTH(0x10)
INPUT SEQ : bufID
OUTPUT SEQ : traceDepth

**4.29	emuGetTraceInfo. -- Get trace status.
//wait for check
Syntax
	STATUS emuGetTraceInfo(U16 *lastBuff, U32 *curCNT0, U32 *curCNT1, U16 *bufNO)

Description
	Return the trace buffer and trigger counters statuses of MICEPack.

Parameter
	lastBuff	the last used trace buffer number.
	curCNT0	current value of counter 0.		// used 32-bits counter
	curCNT1	current value of counter 1.
	bufNO		trace buffer number
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

4.30	emuGetVerify -- Get Memory Write Verification Flag

Syntax		
	STATUS EmuGetVerify(U16 *verifyFlag)

Description	
	Get thememory verification flag. 

Parameter
	verifyFlag	 0 : memory verification OFF
			 1 : memory verification ON

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = GET_VERIFY(0x1a)
INPUT SEQ : 
OUTPUT SEQ : verifyFlag

**4.32	emuGo -- Running Target CPU
//this routine is changed from mp68k
Syntax		
	STATUS emuGo(U16 mode,ADDR fromAddr,ADDR tillAddr)

Description	
	running from current PC.

Parameter
	mod	indicates the mode of free-running:
		mode = NORMAL_RUN, 
		mode =FREE_RUN, free run
		mode =FLY_RUN,on the fly.//not supported
		mode =SPA_MA_RUN for module analysis
		mode =SPA_TA_RUN for time analysis
		mode =SPA_CC_RUN for code coverage
fromAddr	the start PC to go. If fromAddr�s dataType=0, indicate this parameter has no sense(then go from PC).
tillAddr	the end PC to go. If endAddr�s dataType=0, indicate this parameter has no sense.

Return Value	
	ICE_OK			Normal return.
	ICE_EP_PENDING		Sync In is not ready.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = GO_COMMAND(0x1c)
INPUT SEQ : mod,fromAddr,tillAddr
OUTPUT SEQ : 

**4.35	emuLIstTraceBuff -- List the frame data of trace buffer.
	//wait for check
Description
	STATUS emuListTraceBuff(U32 startFrame, 
					U32 dwFrameNum, QUALIFY_INFO *qualifyInfo,
					U8 *frameLen,TRACE_INFO *traceInfo,
					U8 *readEnd)
Description
	This function reads data starting  from the specified startFrame, and puts data to traceInfo.  The qualifier conditions(if any) have to be given in the structure named cond.  The returned data frame size is stored in frameLen.
Parameter
startFrame	start frame number	dword
dwFrameNum	frame number to get	dword (MAX 255)	// list max 32 frames each time
*qualifyInfo	BUFFER FILTER 				// no used in MTAT-II
*frameNum	the trace buffer frame number that has been read out
*traceInfo	The struct array that stores the trace buffer content, depend on  TraceMask 
*readEnd  	the flag show whether all specified frame has been read out. readEnd = 1, all are read out; readEnd =0, remained

Return Value	
	ICE_OK			Normal return.
	ICE_BUFFER_EMPTY	No trace data.
	ICE_REC_TIME_OUT	Communication error

following is only for FW:
COMMAND ID = LIST_TRACE(0x1f)
INPUT SEQ : startFrame, dwFrameNum, qualifyInfo
OUTPUT SEQ : frameNum, traceInfo[frameNum], readEnd

2	1	1	frameNum*frameLen bytes	1	
status	len1	frame
num	traceInfo	ending	

	// special : There is no length for traceInfo buffer.

4.37	emuReset -- Reset target CPU

Syntax		
	STATUS emuReset(ADDR addr)
//this routine is changed from mp68k
Description
	Reset cpu.

Parameter
	addr 		the specified PC value after �Reset”;
			if addr.space == 0, then this parameter has no sense
Return Value
	ICE_OK			Normal return.
	ICE_NO_VCC			No target Vcc.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = RESET(0x22)
INPUT SEQ : addr
OUTPUT SEQ : 

**4.38	emuSearch -- Search pattern in a specified address range.

Syntax		
	STATUS emuSearch(ADDR addr, U32 len, U8 *buff, U16 patternLen,U8 caseFlag,
				RET_ADDR* retAddr)

Description	
	Search the pattern in the specified address range.

Parameter
addr	The start address of searching
len	The address range to be searched.
buff	Data pattern
patternLen	Pattern length.(<= 32)
caseFlag	0:sensitive; 1:non_sensitive	// memory search not supported ascii search
retAddr	the matched address if ICE_OK
	the error address if error ICE_NOT_READY
Return Value	
	ICE_OK				Found the pattern in the address range.
	ICE_NO_MATCH			No match pattern in the address range.
	ICE_MEM_GUARD		Write guard memory.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = SEARCH(0x23)
INPUT SEQ : addr,len, patternLen ,buff(patternLen bytes)
OUTPUT SEQ :  retaddr(in any situation,this must be returned)
		if mismatch or error , return error retAddr
			if error return error address

**4.40	emuSetAllEvent -- Define all events 
//wait for check
Syntax		
	STATUS emuSetAllEvent(BUS_EVENT *event_record, U16 *ext_record)

Description	
	Set all bus events, execution breakpoints and external trigger.

Parameter
	event_record		8 bus events setting.
	ext_record			External trigger.

Return Value	
	ICE_OK				Normal return
	> 0 value				Hardware error.
	ICE_NO_TRACE_MODULE		Trace board does not exist.
	ICE_REC_TIME_OUT			Communication error

4.41	emuSetBp -- Define an execution breakpoint 

Syntax		
	STATUS EmuSetBp(ADDR addr)

Description	
	Set an execution breakpoint .

Parameter
	addr	the matched address of execution breakpoint .

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = SET_EX_BKPT(0x29)
INPUT SEQ : addr
OUTPUT SEQ : 

**4.42 emuSetControl -- Set the control signals of target system

Syntax
	STATUS EmuSetControl(U8 id,U8 value)

Description
	set control signals

Parameter
	id : signal id => 0 for Reset,
				1 for EA
	value	: control signal value
			0:disable 1:enable
	
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = SET_CONTROL(0x25)
INPUT SEQ : signals
OUTPUT SEQ : 

4.45	emuSetEvent -- Define a bus event 
//wait for check
Syntax		
	STATUS EmuSetEvent(U16 evId, BUS_EVENT *busEventData)

Description	
	Set a bus event.  

Parameter
	evId			bus event ID.
	busEventData	bus event value.

Return Value	
	ICE_OK				Normal return
	> 0 value				Hardware error.
	ICE_NO_TRACE_MODULE		Trace board does not exist.
	ICE_REC_TIME_OUT			Communication error

4.46	emuSetExtEvent -- Define an external trigger in event. 
//wait for check
Syntax		
	STATUS emuSetExtEvent(U16 evData)

Description	
	Set an external trigger event.

Parameter
	evData	: external trigger data. 
			0 : low active, 1: high active.

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = SET_EXT_EVENT(0x3a)
INPUT SEQ : evData
OUTPUT SEQ : 

4.47	emuSetID -- Set CPU type

Syntax		
	STATUS emuSetID(U16 idFlag)

Description	
	Set the CPU type.
	
Parameter
	idFlag	CPU ID. 
Return Value	
	ICE_OK			Normal return.
	ICE_INVALID_CPU		The inputted CPU type mismatches hardware CPU.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = SET_ID(0x2a)
INPUT SEQ : idFlag
OUTPUT SEQ : 

4.48	emuSetMap -- Set emulation memory map

Syntax		
	STATUS emuSetMap(ADDR addr1, ADDR addr2, U16 attrib)
notes: this routine is changed from MP68K(u32 addr ==> ADDR addr)
Description
	addr1, addr2 indicate the range address of map memory. addr1, addr2 should be on the boundary of 32bytes.The definition of attrib is as described below.
	       |	   
	       |___>take care here

//it is changed from mp68k
	MAP_ERW = 0x0,	// external read/write
	MAP_ORW = 0x1,	// overlay read/write
	MAP_ER = 0x2,		// external read only	
	MAP_OR = 0x3,		// overlay read only
	MAP_GUARD		// guard

Parameter
	addr1		start address of memory mapping.
	addr2		end address of memory mapping
	attrib	attribute of memory mapping

Return Value	
	ICE_OK					Normal return.
	ICE_BANK_FULL				No more bank available.
	ICE_ADDR_RANGE_OVERFLOW		The address range exceeds EMM size.
	ICE_ATTRIBUTE_MISMATCH		Unavailable attribute.
	ICE_REC_TIME_OUT			Communication error

following is only for FW:
COMMAND ID = SET_MAP(0x2c)
INPUT SEQ : addr1,addr2,attrib(2 bytes)
OUTPUT SEQ :   

4.49	emuSetMemN -- Write N bytes memory to 251

Syntax		
	STATUS emuSetMemN(ADDR addr, U8 *buff, U16 patternLen,RET_ADDR* retAddr)

Description	
	Write data from buff to addr location. The driver program can use this function to download code from a file.

Parameter
	addr		the start address of data to write.
	len		the length of data.
	buff		the buffer to be written.
	retAddr	the error address if ICE_ERROR_WRITE, ICE_NOT_READY
Return Value	
	ICE_OK			Normal return.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_ERROR_WRITE		Memory write failure.
	ICE_MEM_GUARD		Write guard memory.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = SET_MEM_N(0x2b)
INPUT SEQ : addr,buff(patternLen bytes)
OUTPUT SEQ :   ret_addr (in any situation,this value must be returned)

**4.50	emuSetReady -- Select READY signal

Syntax		
	STATUS emuSetReady(U16 readyFlag)

Description	
	Select the READY signal from External or Internal.
	
Parameter
	readyFlag	0 : ready internal
			1 : ready external
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

4.51	emuSetReg -- Set a CPU or internal register

Syntax		
	STATUS emuSetReg(REG_MODE regMode, S16 regId, U32 content)

Description	
	Set a CPU register.
 
Parameter
	regMode	CPU register, or math processor register. //reserved
	regId		register ID
	content	register value.

Return Value
	ICE_OK			Normal return.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = SET_REG(0x2e)
INPUT SEQ : regMode,regId,content
OUTPUT SEQ :   

**4.52	emuSetSync -- Set synchronization setting

Syntax
	STATUS emuSetSync(U16 syncFlag)

Description
	Set synchronization under multi-emulation configuration. 

Parameter
	syncFlag	Bit-0 is the status of Input Sync, 1=ON and 0=OFF
			Bit-1 is the status of Output Sync, 1=ON and 0=OFF.
Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

**4.53	emuSetTimerCounter -- Set the timer or counter of trace buffer

Syntax		
	STATUS emuSetTimerCounter(U16 tcFlag, U32 tcData0, U32 tcData1);

Description	
	Set the timer or counters for trigger.

Parameter
	tcFlag	bit 0 is tmr-cnt0 : 0 = counter, 1 = timer.
			bit 1 is tmr-cnt1 : 0 = counter, 1 = timer.
	tcData0	the data to be set.for tmr-cnt0
	tcData1	the data to be set.for tmr-cnt1

Return Value	
	ICE_OK			Normal return
	ICE_TIMER_ERROR		timer value is out of boundary(1 to 0x100000.)
	ICE_CNT_ERROR		Counter value is out of boundary(1 to 0x400.)
	ICE_REC_TIME_OUT		Communication error

**4.54	emuSetTimerReg -- Set to disable EP timer

Syntax
	STATUS emuSetTimerReg(U16 settings)
//attention: changed from 68k
Description
	I think there is only one timer in EP.	

Parameter
	settings		0 : trace timer off
				1 : trace timer on

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = SET_TIMER_REG(0x3c)
INPUT SEQ : settings
OUTPUT SEQ :   

**4.55	emuSetTraceBreak -- Break or Trace off when trace buffer is full
//wait for check
Syntax
	STATUS emuSetTraceBreak(U16 breakFull)

Description
	Break when trace buffer is full,or trace off when trace buffer is full

Parameter
breakFull	2 : Trace off when trace buffer is full.
	1 : Break when trace buffer is full .
	0 : Overwrite from the beginning of trace buffer when the trace buffer is full.

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error

4.56	emuSetTraceBuff -- Set trace buffer number
//not supported
Syntax
	STATUS emuSetTraceBuff(U16 traceBufNum)

Description
	Set trace buffer number. 

Parameter
	traceBufNum	the trace buffer number to set (1, 2, 4, 8, 16,.....256).

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error

**4.57	emuSetTrig -- Set trigger level
//wait for check
Syntax
	STATUS emuSetTrig(U16 levelNo, TRIGGER *tmpTrig)

Description	
	Set a trigger level.

Parameter
levelNo :	trigger level number.
tmpTrig->event[] : 	stores the events and counters settings up to 11 items. each byte is assigned : 1-9: corresponding event no.; 10: cnt0; 11:cnt1, 0: end.
tmpTrig->action[]: 	each cell of this array stores the trigger actions which corresponds to the 	event number. in same order. The meanings of action flag bits are :
	0 : level bit0	4 : TC1 rst		8 : TC1 stop 	12 : TrigOut
	1 : level bit1	5 : TC0 start	9 : Trc off		13 : TrigOut (Hi-Z)
	2 : break		6 : TC1 start	10 : Trc start
	3 : TC0 rst 	7 : TC0 stop	11 : Trc stop
	Level bits are the sequence level number, value is 0~3
	TC0 : timer-counter0, TC1 timercounter1
	Counter increase setting : both TCx start and TCx stop are setted.to 1.
	Trace qulify setting : both Trc start and Trc stop are setted to 1.
	TrigOut setting is depended on emuSetExtEvent().
	tmpTrig->mode : only available in TR1 setting.  0: BAckward, 1: Forward , 2: Center

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error

examples :
	TR1 EV5 BReak Troff EV1 Reset EV9 Next EXTIn TImer EXTIn EXTOut BAckward
	tmpTrig->event[]  = { 5, 1, 9, 11, 0 }
	tmpTrig->action[] = { 0x09, 0x02, 0x210, 0x600, 0 }
	tmpTrig->mode  = 0;

4.58	emuSetVerify -- Set Memory Write Verification Flag

Syntax		
	STATUS emuSetVerify(U16 verifyFlag)

Description	
	Enable/Disable verification of memory write operation. 

Parameter
	verifyFlag	 0 : memory verification OFF
			 1 : memory verification ON

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = SET_VERIFY(0x35)
INPUT SEQ : verifyFlag
OUTPUT SEQ :   

4.60	emuStepRange-- Instruction Step within range
	//not supported
Syntax		
	STATUS emuStepRange(ADDR addr1, ADDR addr2)

Description	
	Instruction steps from current PC. addr1 and addr2 indicate the address range for step range operation.  If addr1 equals to addr2, this instruction step will be operated as single step. 

Parameter
	addr1		start address of step
	addr2		end address of step

Return Value	
	ICE_OK			Normal return.
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_MEM_GUARD		Write guard memory.
	ICE_MEM_PROTECT		Write write-protected mempry.
	ICE_REC_TIME_OUT		Communication error

4.61	emuTest -- Test whether a specified address range is in RAM or not.

Syntax		
	STATUS emuTest(ADDR addr1, U32 len,RET_ADDR* retAddr)

Description	
	Test a memory range whether it is located in RAM or not. It also tests whether the RAM is in workable condition or not.

Parameter
	addr1		start address of testing
	len		length of block to testing
	retAddr	error address if ICE_ERROR_WRITE, ICE_TEST_FAIL
		 ICE_NOT_READY,ICE_ERROR_READ
Return Value	
	ICE_OK			Is RAM.
	ICE_ERROR_WRITE		Isn't RAM
ICE_TEST_FAIL		TEST FAIL
	ICE_BUS_REQUEST		Bus request
	ICE_NOT_READY		Target is not ready
	ICE_STEP_ERROR		Target can not step
	ICE_MICE_HALT		Target CPU halted
	ICE_TARGET_RESET		The signal of tagert reset pin is low
	ICE_NO_VCC			No Target Vcc
	ICE_MEM_GUARD		Write guard memory.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = TEST(0x39)
INPUT SEQ : addr1, len
OUTPUT SEQ :   ret_addr if (in any situation,this value must be returned)

4.62	emuSetConfig -- config the cpu settings.

Syntax		
	STATUS emuConfig(U8  configset[8], U8  configGet[8])

Description	
	config the cpu settings.

Parameter
	
configset[8]		set config
			byte0:	tconfig0
				bit0:	SRC	0: binary mode
						1: source mode
				bit1:	PAGE	0: page mode ( A15:8/D7:0 on P2; A7:0 on P0)
						1: nonpage mode(A15:8 on P2, A7:0/D7:0 on 						P0)
				bit2-3: 	bit2:RD0, bit3:RD1
					specify an 18-bit, 17-bit or 16-bit external address bus and 							address ranges for RD#, WR# and PSEN# . see table A.
				bit4:	XALE	extend ALE:
						1: ALE=Tosc.
						0: ALE=3Tosc.( Add one additional state )
				bit5-6:	WSA1:0#:
					for external memory accesses, selects the number of wait 					 		states for RD#, WR# and PSEN#.
					00	insert 3 wait states for all regions except 01;
					01	insert 2 wait states for all regions except 01;
					10	insert 1 wait states for all regions except 01;
					11	insert 0 wait states for all regions except 01;
				bit7:		80C251Sx,83C251Sx: reserved
						87C251Sx	UCON
						configuration byte location selector.
		
		    byte1: tconfig1		
				bit0:	EMAP	Eprom map for devices with 16kb on-								chip code memory.
						0: map upper half of on-chip code to 00:
						example: map FF:2000h-3fffh to 00:e000h-ffffh
						1: disable eprom map.
				bit1-2: 	WSB1:0#  external wait state B (region 01:)
				bit3:	WSB only for A-step compatibility.
				bit4:	INTR	interrupt mode
					1:	push 4 bytes on to stack. (3 PC, 1PSW1)
					0:	push 2 bytes ( 2 low bytes PC )
			/**/	bit5-6:	RS1-0  Ram Size
					11:  1 KBytes
					10:  512 Bytes
					01:  Reserved
					00:  0 Bytes
			/**/	bit7:	ES   EPROM Size
					1:  16K
					0:  8K
	   byte2-7:	reserved
configGet[8]		existing config
		same as settings
Return Value	
	ICE_OK			config ok.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = CONFIG_CPU(0x50)
INPUT SEQ : configset (8 bytes)
OUTPUT SEQ : configGet(8 bytes)

4.63	emuGetConfig -- get the cpu config settings.

Syntax		
	STATUS emuGetConfig(U8  configset[8])

Description	
	config the cpu settings.

Parameter
	configset:  		please refer to emuSetConfig
Return Value	
	ICE_OK			config ok.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = GET_CONFIG(0x51)
INPUT SEQ : 
OUTPUT SEQ : configGet(8 bytes)

4.64	emuGetFWSupport -- get CPU modules supported by current firmware

Syntax		
	STATUS emuGetFWSupport(U16 * wCpuNum,U16* wCpuType)

Description	
	get CPU modules supported by current firmware

Parameter
	wCpuNum		the pointer to the total number of supported CPU modules
	wCpuType		the pointer to UINT array which stores CPU modules’ ID.
Return Value
	ICE_OK			config ok.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = GET_FW_SUPPORT(0x52)
INPUT SEQ : 
OUTPUT SEQ : wCpuNum, wCpuType(2* wCpuNum bytes)

4.65	emuClrBp -- Clear execution breakpoint 

Syntax		
	STATUS emuClrBp(ADDR addr)

Description	
	Clear an execution breakpoint .
	If Addr.space == 0 that means clear all bps.
Parameter
	addr	the matched address of execution breakpoint .

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = CLR_BP(0x54)
INPUT SEQ : addr
OUTPUT SEQ : 

4.65	emuSetPort -- Set the trace record port

Syntax		
	STATUS EmuSetPort(U16 portNum)

Description	
	Set trace port num
Parameter
	portNum	trace port : 0 -- p0, 1 -- p1, 2 -- p2 , 3 -- p3

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
following is only for FW:
COMMAND ID = SET_PORT(0x55)
INPUT SEQ : portNum
OUTPUT SEQ : 

4.65	emuStepOne -- Instruction Step one assembly command

Syntax		
	STATUS EmuStepOne(U8  StepMode ,U16 uNextAddrNum, ADDR* NextAddr)

Description
StepMode == 0 : For ZJ HW	
Instruction steps from current PC. If meet with a sub rountine, PC will enter into the sub 	rountine. The SW must  cast the next addresses after current instruction be exectued.
Using nextAddrNum and NextAddr to set the next addresses(maybe).
StepMode == 1 : For TaiWan HW	
uNextAddrNum, NextAddr have no meaning
Parameter
StepMode	0 for EasyPack 251. 1 for TaiWan HW.
uNextAddrNum	the number of address able to get after current instruction be executed.
NextAddr	the address array.

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
following is only for FW:
COMMAND ID = STEP_ONE(0x38)
INPUT SEQ : StepMode, uNextAddrNum, NextAddr(6* uNextAddrNum)
OUTPUT SEQ : 

4.66	emuStepOver -- Instruction Step one assembly command

Syntax		
	STATUS emuStepOver(U8 StepoverMode ,UINT uNextAddrNum, * ADDR NextAddr)

Description	
	Instruction steps from current PC. If meet with a sub routine, PC will skip over the sub routine.

Parameter
StepoverMode	Please refer to emuStepOne
	uNextAddrNum	the number of address able to get after current instruction be executed.
NextAddr	the address array.
      Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

following is only for FW:
COMMAND ID = 0STEP_OVER(0x56)
INPUT SEQ : StepMode, uNextAddrNum, NextAddr(6* uNextAddrNum)
OUTPUT SEQ : 

**// not support in MTAT-II
4.67     emuCycle -- Instruction Step one assembly command and offer 				        cycle information
	
Syntax		
	STATUS AbiStepOne(U8 StepMode,WORD wNextAddrNum,ADDR* NextAddr,U8* frameNum, 			TRACE_INFO* traceInfo)

Description	
	Instruction steps from current PC. If meet with a sub rountine, PC will enter into the sub rountine. The SW must  cast the next addresses after current instruction be exectued. The FW will return the next instruction address and cycle informations.

Parameter
StepMode	please refer to emuStepOne		
wNextAddrNum	the number of address 251 able to get after current instruction be executed.
NextAddr	the address array.
frameNum,traceInfo	cycle result information
       Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error

following is only for FW:
COMMAND ID = 
INPUT SEQ : StepMode, uNextAddrNum, NextAddr(6* uNextAddrNum)
OUTPUT SEQ   :      frameNum, traceInfo

4.68	emuEreaseFlash -- Erease all flash prom or some bank of the flash prom.

Syntax
	STATUS emuEreaseFlash (U32 bankNo,RET_ADDR* addr)

Description
	Erease all flash prom or part of  the flash prom.

Parameter
bankNo		251ICE used a 128kb flash prom Am29f010.
			every 16Kb is a bank. so the 128kb seperated to 8 banks.
			bit 0: 	0:	don’t erease bank0.    0x0-0x3fff
					1:	erease bank0.
			bit 1: 	0:	don’t erease bank1.    0x4000-0x7fff
					1:	erease bank1.
			bit 2: 	0:	don’t erease bank2.    0x8000-0xbfff
					1:	erease bank2.
			bit 3: 	0:	don’t erease bank3.    0xc000-0xffff
					1:	erease bank3.
			bit 4: 	0:	don’t erease bank4.    0x10000-0x13fff
					1:	erease bank4.
			bit 5: 	0:	don’t erease bank5.    0x14000-0x17fff
					1:	erease bank5.
			bit 6: 	0:	don’t erease bank6.    0x18000-0x1bfff
					1:	erease bank6.
			bit 7: 	0:	don’t erease bank7.    0x1c000-0x1ffff
					1:	erease bank7.
			bit 8-31:		reserved 
			
	addr:			return the wrong address if ICE_FLASH_EREASE_FAIL

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
	ICE_FLASH_EREASE_FAIL
following is only for FW:
COMMAND ID = EREASE_FLASH(0x59)
INPUT SEQ : bankNo
OUTPUT SEQ : ret_addr (in any situation,this must be returned)

4.69	emuProgFlash -- Program  flash prom .

Syntax
	STATUS emuProgFlash ( ADDR startAddr, U8 dataLen,  U8 *dataContent, ,RET_ADDR* addr)

Description
	Program flash prom 

Parameter
startAddr		the start address of flash prom to be programmed.
dataLen 		the byte number to be programmed
dataContent		data values to be programmed
	addr			return the wrong address if ICE_FLASH_PROG_FAIL

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
	ICE_FLASH_PROG_FAIL
following is only for FW:
COMMAND ID = PROG_FLASH(0x58)
INPUT SEQ : startAddr, dataLen, dataContent
OUTPUT SEQ   :      ret_addr (in any situation,this value must be returned)

4.70	emuSwitchFlash -- prepare for erease or program flashprom 

Syntax
	STATUS emuSwitchFlash (void)

Description
	Prepare for flash prom operations.  
attention: This routine only could be called once time before others flash prom operation.
After flash prom operations are finished, user must reset the 251ICE.

Parameter
 None

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT		Communication error
	ICE_FLASH_SWITCH_FAIL
following is only for FW:
COMMAND ID = SWITCH(0x59)
INPUT SEQ : 
OUTPUT SEQ   :      

4.71	emuFillFlashBlank -- Fill flash�s blank area by special value

Syntax
	STATUS emuFillFlashBland ( ADDR addr1, ADDR addr2, U8 blankValue,RET_ADDR* retAddr)

Description
Fill the special value to flash prom�s unprogrammed area.	 
	This routine must be executed after the flash prom programming finished.
Parameter
addr1			blank area�s start address
addr2			blank area�s end address
blankValue		one byte blank value.
	retAddr 		error address if ICE_FLASH_SWITCH_FAIL

Return Value	
	ICE_OK			Normal return.
	ICE_REC_TIME_OUT	Communication error
	ICE_FLASH_SWITCH_FAIL
following is only for FW:
COMMAND ID = FILL_FLASH_BLANK(0x5a)
INPUT SEQ :addr1,addr2,blankValue 
OUTPUT SEQ   :    ret_addr (in any situation,this value must be returned)

4.72	emuFwInit -- Initialize the FW when S/W startup

Syntax
	STATUS emuFwInit(void)

Description
	Initialize the FW when S/W startup

Parameter
	
Return Value	
	ICE_OK			Normal return.
following is only for FW:
COMMAND ID = FW_INIT(0x55)
INPUT SEQ :
OUTPUT SEQ   :    

 4.73 emuSetDecodeRam -- Write N bytes  to 251 decode ram

Syntax		
	STATUS emuSetDecodeRam(ADDR addr1, U8 len,U8 *pszBuffer, RET_ADDR* retAddr)

Description	
	Write data from pszBuffer to addr location. The driver program can use 
	this function to download code from a file.

Parameter
len			the length of data buffer, the value must be in range 1~255.
	addr			the start address of data buffer to write.
	pszBuffer		the data buffer to be written.
retAddr		error address if ICE_ERROR_WRITE
Return Value	
	ICE_OK			Normal return.
ICE_ERROR_WRITE		ERROR WRITE DECODE RAM
following is only for FW:
COMMAND ID = SET_DECODE_RAM(0x5b)
INPUT SEQ :addr1 ,len, pszBuffer(len bytes)
OUTPUT SEQ : ret_addr (in any situation,this value must be returned)

**4.74emuGetHWMode -- ZJ HW OR TaiWan HW BOARD

Syntax
	STATUS emuGetHWMode(U8 *mode);

Description
Get the HW MODE 	
Parameter
	mode		0: ZJ HW
			1: TaiWan HW

Return Value	
	ICE_OK			Normal return.
following is only for FW:
COMMAND ID = GET_HW_MODE(0x5C)
INPUT SEQ :
OUTPUT SEQ : mode

ABI ROUTINE	  68k	  251	  196	
GET_ID 	supported	supported	supported	
CHECKSUM	supported	supported	supported	
CLR_EVENT	supported	wait check	supported	
CLR_TRIG	supported	wait check	supported	
COMPARE	supported	supported	supported	
COPY	supported	supported	supported	
FUNCTION_TEST	supported	not supported	not supported	
ESC_COMMAND	supported	not supported	not supported	
FILL_COMMAND	supported	supported	supported	
GET_ALL_CO_REG	supported	not supported	not supported	
GET_ALL_INTERNAL_REG	supported	not supported	not suppored	
GET_ALL_REG  	supported	supported	supported	
GET_CO_COVERAGE	supported	not supported	not supported	
GET_CO_REG	supported	not supported	not supported	
GET_CONTROL	supported	supported	supported	
GET_DEPTH	supported	wait check	supported	
GET_EVENT	supported	wait check	supported	
GET_MAP	supported	supported	supported	
GET_MAP_SIZE	supported	not supported	not supported	
GET_MODE	supported	not supported	not supported	
GET_READY	supported	not supported	not supported	
GET_REG	supported	supported	supported	
GET_SIZE	supported	not supported	not supported	
GET_STAT	supported	not supported	not supported	
GET_SYNC	supported	not supported	not supported	
GET_VERIFY	supported	supported	supported	
GET_WAIT	supported	not supported	not supported	
GO_COMMAND	supported	supported	supported	
HALT	supported	not supported	not supported	
INPUT	supported	wait check	supported	
LIST_TRACE	supported	wait check	supported	
OUTPUT	supported	wait check	supported	
READ_MEM_N	supported	supported	supported	
RESET	supported	supported	supported	
SEARCH	supported	supported	supported	
SET_TRACE_BUFF	supported	wait check	supported	
SET_CONTROL	supported	supported	supported	
SET_CO_COVERAGE	supported	not supported	not supported	
SET_CO_REG	supported	not supported	not supported	
SET_EVENT	supported	wait check	supported	
SET_EX_BKPT	supported	supported	not supported	
SET_ID	supported	supported	supported	
SET_MEM_N	supported	supported	supported	
SET_MAP	supported	supported	supported	
SET_MODE	supported	not supported	not supported	
SET_REG	supported	supported	supported	
SET_READY	supported	not supported	not supported	
SET_SIZE	supported	not supported	not supported	
SET_SYNC	supported	not supported	not supported	
SET_TRACE_BREAK	supported	not supported	not supported	
SET_TRIG	supported	wait for check	supported	
SET_TIMER_COUNTER	supported	not supported	not supported	
SET_VERIFY	supported	supported	supported	
SET_WAIT	supported	not supported	not supported	
STEP	supported	not supported	supported	
STEP_ONE	supported	supported	supported	
TEST	supported	supported	supported	
SET_EXT_EVENT	supported	wait for check	supported	
SET_ALL_EVENT	supported	wait for check	not supported	
SET_TIMER_REG	supported	supported	not supported	
GET_CPU_STATUS	supported	supported	supported	
ABORT	supported	supported	supported	
GET_TRIG	supported	wait check	supported	
GET_LAST_BUFF	supported	wait check	supported	
DIAGNOSTIC	supported	wait check	supported	
CONFIG_CPU	not supported	supported	not supported	
GET_CONFIG	not supported	supported	not supported	
GET_FW_SUPPORT	not supported	supported	supported	
SET_BP	not supported	supported	supported	
CLR_BP	not supported	supported	supported	
SET_PORT	not supported	supported	not supported	
FW_INIT	not supported	supported	supported	
STEP_OVER	not supported	supported	supported	
CYCLE	not supported	supported	not supported	
EREASE_FLASH	not supported	supported	supported	
PROG_FLASH	not supported	supported	supported	
SWITCH_FLASH	not supported	supported	supported	
FILL_FLASH_BLANK	not supported	supported	supported	
SET_DECODE_RAM	not supported	supported	supported	
GET_HW_MODE	not supported	supported	not supported	
SELECT_BAUD	not supported	not supported	not supported	
CLEAR_ALL_EVENT	not supported	wait check	supported	
SET_QUALIFY	not supported	wait check	supported	
CLEAR_QUALIFY		not supported	wait check	supported	
SET_LEVEL		not supported	wait check	supported	
SET_TRIGGER_STATUS	not supported	wait check	supported	
SET_TRACE_STATUS	not supported	wait check	supported	
INIT_BANK	not supported	not supported	supported	

Signatures:(for 251 ABI document)
	Test Engineer:  __________   Date: _______ 
	Test Engineer:  __________   Date: _______ 
	Test Engineer:  __________   Date: _______ 
	Test Engineer:  __________   Date: _______

	SW Engineer:  __________    Date: _______
	SW Engineer:  __________    Date: _______
	SW Engineer:  __________    Date: _______
	SW Engineer:  __________    Date: _______

	HW Engineer:  __________    Date: _______
	HW Engineer:  __________    Date: _______
	HW Engineer:  __________    Date: _______
	HW Engineer:  __________    Date: _______

	Manager:       __________   Date: _______
	Manager:       __________   Date: _______
	Manager:       __________   Date: _______