PALASM 4 v1.5 MACH FITR - MARKET RELEASE (7-24-92)
 (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1990,91,92

 
Reading User Design (TRE File)...
User Logic Pre-Placements... (PLC File)
|> WARNING F190 - Signal not found in Design! (Placement ignored) EA0

            ES4        EPSGN12       CLREMPTY   _9_ICEACTIVE
     _9_SDESGN8    _9_ESGN8ACT       _9_X17_Q    _9_ICEVALID
 
Reading Device Database ...

*************************************************
     Mach PLD Fitter - v 1.67          eph215
*************************************************

PAIR Analysis...
|> WARNING F179 - Pair Declaration Ignored: 215 PAIR S/R found - BUF0/_2_BUFQ1
|> WARNING F175 - Pair Equation Caution Bad Placements - BUF0/_2_BUFQ1

Pre-Placement & Equation Usage Checks... 
 
|> WARNING F210 - Design contains both floating & fixed placements.  


|> WARNING F138 - Clock signal(s) connected by PT logic: 
     _5_EPHOLDQ         ESGN10       _5_X29_D    _13_ENRDNDT





*** Timing Analysis for Signals

 Parameter   Min   Max           Signal List (Those having Max delay.)
      Tpd     1     2          _5_IO34_I 
      Tsu     1     3         _5_EPHOLDQ 
      Tco     0     2         _13_IO37_I       _5_IO34_I     _13_SDESGN8 
                              _13_RSICVL 
      Tcr     1     3       _13_ICEVALID      _5_EPHOLDQ           ESGN8 
                             _13_ENRDNDT    _13_PRTNDTVL 
.

 Key:
 Tpd - Combinatorial propagation delay, input to output
 Tsu - Combinatorial setup delay before clock
 Tco - clock to output (register output to combinatorial output)
 Tcr - Clock to register setup delay
.......(Register output thru combinatorial logic to reg input)
 All delay values are expressed in terms of array passes




*** Device Resource Checks

                Available        Used        Remaining
        Clocks:     2              1              1
          Pins:    38             32              6     ->    84%
     I/O Macro:    32             12             20
   Total Macro:    64             31             33
 Product Terms:   128             35              4     ->    96%
 
MACH-PLD Resource Checks OK!  



Partitioning Design into Blocks...

|> ERROR F740 - Resource violation in preplacement: (IO Pins) - Block B


*** Last Equations Placed in Blocks

Weakly -      _13_IO37_I       _13_M47_O     _13_ENRDNDT    _13_PRTNDTVL 
Assign -    _13_ESGN8ACT   _13_ICEACTIVE        _5_X29_D       _5_IO34_I |> INFORMATION F085 - Intermediate Error Count: 1, Warning Count: 5
|> INFORMATION F075 - Redo Partitioning with Max Packing Flag=True 

*** Last Equations Placed in Blocks

Weakly -      _13_IO37_I    _13_ICEVALID       _13_M47_O      _13_RSICVL 
Assign -     _13_ENRDNDT    _13_ESGN8ACT        _5_X29_D       _5_IO34_I 


|> INFORMATION F050 - Device Utilization.............. *: 78 %



*** Block Partitioning Results

               Array   Product     # I/O    Buried    Signal    Macros
              Inputs    Terms      Macro     Logic    Fanout    Remain
   Block-> A    16        32*        3         5         6         8
   Block-> B     9        28         1         6         6         9
   Block-> C    13        32*        2         6         7         8
   Block-> D    12        32*        6         2         7         8



*** Block Signal List

Blk-> A   _13_PRTNDTVL  6  _13_ICEACTIVE  4       _5_ACTRD  5       _2_BUFQ3  1
                EPSGN8  3           ETB2  3           QSMD  3       _2_BUFQ1  0

Blk-> B       _5_X29_D  2    _13_ENRDNDT  1      _13_M47_O  1     _5_EPHOLDQ  2
            _5_ICEHOLD  2       _2_BUFQ2  1        EPSGN18  1

Blk-> C      _5_IO34_I  1   _13_ESGN8ACT  1     _13_RSICVL  2   _13_ICEVALID  2
            _13_IO37_I  1       _2_BUFQ4  1          EMPTY  1          ESGN7  5

Blk-> D      _13_X17_Q  5    _13_SDESGN8  5           NEWR  3           NERD  2
               NSTROBE  1         ESGN10  5          ESGN9  2          ESGN8  6



*** Block Input List

Blk-> A           BUF0  2         EPSGN3  1           EPT5  1        EPSGN16  1
                  EPT4  1        EPSGN15  1           EPS0  3           EPS1  3
                  EPS2  3           EPS3  3          ECTL3  1       _2_BUFQ2  1
              _2_BUFQ4  2     _5_ICEHOLD  1    _13_ENRDNDT  1     _13_RSICVL  1
       

Singular:         EPSGN3{           ETB2}           EPT5{       _5_ACTRD}
                 EPSGN16{           QSMD}           EPT4{           QSMD}
                 EPSGN15{           QSMD}          ECTL3{         EPSGN8}
                _2_BUFQ2{           ETB2}     _5_ICEHOLD{         EPSGN8}
             _13_ENRDNDT{   _13_PRTNDTVL}     _13_RSICVL{   _13_PRTNDTVL}
         

Blk-> B        NICEBRK  1           EPS7  1           EPS6  1       _2_BUFQ3  1
              _5_ACTRD  2      _5_IO34_I  1     _5_EPHOLDQ  1     _13_RSICVL  1
          _13_ICEVALID  1

Singular:        NICEBRK{        EPSGN18}           EPS7{       _5_X29_D}
                    EPS6{       _5_X29_D}       _2_BUFQ3{       _2_BUFQ2}
               _5_IO34_I{     _5_EPHOLDQ}     _5_EPHOLDQ{     _5_ICEHOLD}
              _13_RSICVL{    _13_ENRDNDT}   _13_ICEVALID{      _13_M47_O}
         

Blk-> C       _2_BUFQ1  1         EPSGN8  1           EPT5  2            ES0  1
                   ES1  1            ES2  1            ES3  1         EPSGN4  1
                 ESGN9  1       _5_X29_D  1      _13_X17_Q  1      _13_M47_O  1
            _13_IO37_I  1

Singular:       _2_BUFQ1{       _2_BUFQ4}         EPSGN8{      _5_IO34_I}
                     ES0{          ESGN7}            ES1{          ESGN7}
                     ES2{          ESGN7}            ES3{          ESGN7}
                  EPSGN4{          ESGN7}          ESGN9{     _13_IO37_I}
                _5_X29_D{          EMPTY}      _13_X17_Q{   _13_ESGN8ACT}
               _13_M47_O{     _13_RSICVL}     _13_IO37_I{   _13_ICEVALID}
         

Blk-> D           EPS0  4           EPS1  4           EPS2  4           EPS3  4
                   ES0  1            ES1  2          ESGN8  2        NSTROBE  4
         _13_ICEACTIVE  1    _13_SDESGN8  1   _13_ESGN8ACT  2   _13_PRTNDTVL  1
       

Singular:            ES0{           NEWR}  _13_ICEACTIVE{        NSTROBE}
             _13_SDESGN8{          ESGN8}   _13_PRTNDTVL{          ESGN9}
         

|> INFORMATION F070 - Multiple Assignment Mode - Repeat Count: 4
Assigning Resources...


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=False         Expand All=False



*** Macro Block C

          ESGN7 (C 10)
          EMPTY (C 14)
       _2_BUFQ4 (C  0) -> (A  5)

 Buried Logic>       _5_IO34_I    _13_ESGN8ACT    _13_ICEVALID      _13_IO37_I
                    _13_RSICVL
      Targets>   2(25)   3(na)   5(na)   7(na)  12(30)


|> ERROR F610 - Product Term distribution - No feasible solution! _13_ESGN8ACT 4


|> ERROR F610 - Product Term distribution - No feasible solution! _13_ICEVALID 4


|> ERROR F610 - Product Term distribution - No feasible solution! _13_IO37_I 4

      _5_IO34_I (C  2) -> (B  6)
   _13_ESGN8ACT (C  3) -> (D 10)
   _13_ICEVALID (C  5) -> (B 19)
     _13_IO37_I (C  7) -> (C  3)
     _13_RSICVL (C 12) -> (A 14) (B  1)



*** Macro Block D

           NEWR (D  0)
           NERD (D  2)
          ESGN9 (D 12) -> (C  4)
        NSTROBE (D  6) -> (B  5) (D  5)
          ESGN8 (D 14) -> (B 12) (D  6)
         ESGN10 (D 10)

 Buried Logic>     _13_SDESGN8       _13_X17_Q
      Targets>   4(41)   8(39)

    _13_SDESGN8 (D  4) -> (D  3)
      _13_X17_Q (D  8) -> (C  0)



*** Macro Block Inputs

           EPT4 (I  0) -> (A  2)
        EPSGN15 (I  1) -> (A  0)
        ICECLK1 (I  2) -> (A  1)



*** Macro Block A

           ETB2 (A  6)
         EPSGN8 (A 10) -> (C  5)
           QSMD (A  2)
       _2_BUFQ1 (A  0) -> (C  1)
       _2_BUFQ3 (A  4) -> (B 11)
       _5_ACTRD (A 12) -> (B  0)

 Buried Logic>    _13_PRTNDTVL
      Targets>  14( 9)

   _13_PRTNDTVL (A 14) -> (D  1)

|> ERROR F610 - Product Term distribution - No feasible solution!  

Try Using Expand Product Term Option  
 
 Unplaced:
  _13_ICEACTIVE



*** Macro Block B

        EPSGN18 (B  4)
       _2_BUFQ2 (B  0) -> (A  4)
     _5_ICEHOLD (B  2) -> (A  3)
     _5_EPHOLDQ (B  6) -> (B 10)

 Buried Logic>        _5_X29_D       _13_M47_O     _13_ENRDNDT
      Targets>   8(17)   9(na)  11(na)  13(na)


|> ERROR F610 - Product Term distribution - No feasible solution! _13_M47_O 4


|> ERROR F610 - Product Term distribution - No feasible solution! _13_ENRDNDT 4

       _5_X29_D (B  8) -> (C 21)
      _13_M47_O (B  9) -> (C  6)
    _13_ENRDNDT (B 11) -> (A  8)

           EPT5 (A 12) -> (A  6) (C 17)
           EPS0 (B 14) -> (A 10) (D 13)
        EPSGN16 (A 14) -> (A  7)
           EPS1 (B 12) -> (A  9) (D  9)
           EPS2 (B 10) -> (A 11) (D  8)
           EPS3 (B  8) -> (A 21) (D  7)
           EPS6 (B  0) -> (B  3)
           EPS7 (B  2) -> (B  2)
        NICEBRK (B  6) -> (B 20)
            ES0 (C  0) -> (C 12) (D  4)
            ES1 (C  2)?
         EPSGN3 (A  8) -> (A 15) (B  4)
          ECTL3 (D  8)?
            ES2 (C  4) -> (C  8)
            ES3 (C  6) -> (C  9)
           BUF0 (A  0)?
         EPSGN4 (C  8) -> (C 10)
            ES1 (C  2) -> (C  7)   Blocked -> Reshuffling SwMtrx
        NSTROBE -> (D 15)    Moved.
            ES1 -> (D  5)
          ECTL3 (D  8) ->   Blocked -> Reshuffling SwMtrx
           EPS0 -> (A 13)    Moved. -> Reshuffling SwMtrx
           EPT4 -> (A 10)    Moved.
          ECTL3 -> (A  2)
           BUF0 (A  0) ->   Blocked -> Reshuffling SwMtrx
           EPT4 -> (A 12)    Moved. -> Reshuffling SwMtrx
           EPS0 -> (A 10)    Moved. -> Reshuffling SwMtrx
    _13_ENRDNDT -> (A 13)    Moved. -> Reshuffling SwMtrx
        EPSGN15 -> (A  8)    Moved.
           BUF0 -> (A  0)





Wiring Completion:   88% -> ( 12 nc)

*** Physical Signal Placements

           BUF0  (A  0)        _2_BUFQ1  (A  0)            QSMD  (A  2) 
           ETB2  (A  6)          EPSGN3  (A  8)          EPSGN8  (A 10) 
           EPT5  (A 12)         EPSGN16  (A 14)            EPT4  (I  0) 
        EPSGN15  (I  1)         ICECLK1  (I  2)            EPS0  (B 14) 
           EPS1  (B 12)            EPS2  (B 10)            EPS3  (B  8) 
        NICEBRK  (B  6)         EPSGN18  (B  4)            EPS7  (B  2) 
           EPS6  (B  0)             ES0  (C  0)             ES1  (C  2) 
            ES2  (C  4)             ES3  (C  6)          EPSGN4  (C  8) 
          ESGN7  (C 10)           EMPTY  (C 14)           ESGN8  (D 14) 
          ESGN9  (D 12)          ESGN10  (D 10)           ECTL3  (D  8) 
        NSTROBE  (D  6)            NERD  (D  2)            NEWR  (D  0) 
       _2_BUFQ3  (A  4)        _2_BUFQ2  (B  0)        _2_BUFQ4  (C  0) 
     _5_ICEHOLD  (B  2)        _5_ACTRD  (A 12)       _5_IO34_I  (C  2) 
     _5_EPHOLDQ  (B  6)        _5_X29_D  (B  8)   _13_ICEACTIVE    .?.  
    _13_SDESGN8  (D  4)    _13_ESGN8ACT  (C  3)    _13_PRTNDTVL  (A 14) 
      _13_X17_Q  (D  8)     _13_ENRDNDT  (B 11)      _13_RSICVL  (C 12) 
      _13_M47_O  (B  9)    _13_ICEVALID  (C  5)      _13_IO37_I  (C  7) 
Assigning Resources...
|> INFORMATION F085 - Intermediate Error Count: 6, Warning Count: 5


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=True          Expand All=False



*** Macro Block C

          ESGN7 (C 10)
          EMPTY (C 14)
       _2_BUFQ4 (C  0) -> (A  5)

 Buried Logic>       _5_IO34_I    _13_ESGN8ACT      _13_RSICVL    _13_ICEVALID
                    _13_IO37_I
      Targets>   2(25)   4(26)   6(27)   8(28)  12(30)

      _5_IO34_I (C  2) -> (B  6)
   _13_ESGN8ACT (C  4) -> (D  0)
     _13_RSICVL (C  6) -> (A  2) (B  2)
   _13_ICEVALID (C  8) -> (B  8)
     _13_IO37_I (C 12) -> (C  1)



*** Macro Block D

           NEWR (D  0)
           NERD (D  2)
          ESGN9 (D 12) -> (C  4)
        NSTROBE (D  6) -> (B  5) (D  5)
         ESGN10 (D 10)
          ESGN8 (D 14) -> (B 12) (D  6)

 Buried Logic>       _13_X17_Q     _13_SDESGN8
      Targets>   4(41)   8(39)

      _13_X17_Q (D  4) -> (C  3)
    _13_SDESGN8 (D  8) -> (D  9)



*** Macro Block Inputs

           EPT4 (I  0) -> (A 10)
        EPSGN15 (I  1) -> (A  0)
        ICECLK1 (I  2) -> (A  1)



*** Macro Block A

           ETB2 (A  6)
         EPSGN8 (A 10) -> (C  5)
           QSMD (A  2)
       _2_BUFQ1 (A  0) -> (C  0)
       _2_BUFQ3 (A  4) -> (B 11)
       _5_ACTRD (A 12) -> (B  0)

 Buried Logic>    _13_PRTNDTVL   _13_ICEACTIVE
      Targets>   8( 6)  14( 9)

   _13_PRTNDTVL (A  8) -> (D  2)
  _13_ICEACTIVE (A 14) -> (D  1)



*** Macro Block B

        EPSGN18 (B  4)
       _2_BUFQ2 (B  0) -> (A  4)
     _5_ICEHOLD (B  2) -> (A  3)
     _5_EPHOLDQ (B  6) -> (B 10)

 Buried Logic>        _5_X29_D     _13_ENRDNDT       _13_M47_O
      Targets>   8(17)  10(16)  12(15)  14(14)

       _5_X29_D (B  8) -> (C 21)
    _13_ENRDNDT (B 10) -> (A  7)
      _13_M47_O (B 12) -> (C  9)

           EPS6 (B  0) -> (B  1)
            ES0 (C  0) -> (C  6) (D  4)
           BUF0 (A  0) -> (A  9)
           EPS7 (B  2) -> (B  4)
            ES1 (C  2) -> (C  7) (D  7)
            ES2 (C  4) -> (C  8)
        NICEBRK (B  6) -> (B 20)
            ES3 (C  6) -> (C 15)
           EPS3 (B  8) -> (A 21) (D 21)
         EPSGN3 (A  8) -> (A 15) (B 15)
         EPSGN4 (C  8) -> (C 10)
          ECTL3 (D  8) -> (A 11)
           EPS2 (B 10) -> (A  8) (D  8)
           EPS1 (B 12) -> (A 12) (D 12)
           EPT5 (A 12) -> (A  6) (C 17)
           EPS0 (B 14) -> (A 13) (D 10)
        EPSGN16 (A 14) -> (A 18)





Wiring Completion:  100% -> (  0 nc)

|> INFORMATION F058 - Total Block Fanout (All Signals) *: 54 


*** Signals - Tabular Information

          Signal   #   P/N #   (Loc)      Type     Logic  # PT    Blocks
           BUF0    1     2      A  0       input       .     .    .A...
       _2_BUFQ1    2     2      A  0      buried    d-ff     1    ...C.
           QSMD    3     3      A  2     i/o pin    d-ff     1    .....
           ETB2    4     5      A  6     i/o pin    comb     1    .....
         EPSGN3    5     6      A  8       input       .     .    .AB..
         EPSGN8    6     7      A 10     i/o pin    comb     2    ...C.
           EPT5    7     8      A 12       input       .     .    .A.C.
        EPSGN16    8     9      A 14       input       .     .    .A...
           EPT4    9    10      I  0       input       .     .    .A...
        EPSGN15   10    11      I  1       input       .     .    .A...
        ICECLK1   11    13      I  2   clock pin       .     .    .A...
           EPS0   12    14      B 14       input       .     .    .A..D
           EPS1   13    15      B 12       input       .     .    .A..D
           EPS2   14    16      B 10       input       .     .    .A..D
           EPS3   15    17      B  8       input       .     .    .A..D
        NICEBRK   16    18      B  6       input       .     .    ..B..
        EPSGN18   17    19      B  4     i/o pin    d-ff     1    .....
           EPS7   18    20      B  2       input       .     .    ..B..
           EPS6   19    21      B  0       input       .     .    ..B..
            ES0   20    24      C  0       input       .     .    ...CD
            ES1   21    25      C  2       input       .     .    ...CD
            ES2   22    26      C  4       input       .     .    ...C.
            ES3   23    27      C  6       input       .     .    ...C.
         EPSGN4   24    28      C  8       input       .     .    ...C.
          ESGN7   25    29      C 10     i/o pin    comb     2    .....
          EMPTY   26    31      C 14     i/o pin    d-ff     1    .....
          ESGN8   27    36      D 14     i/o pin    d-ff     1    ..B.D
          ESGN9   28    37      D 12     i/o pin    comb     1    ...C.
         ESGN10   29    38      D 10     i/o pin    d-ff     1    .....
          ECTL3   30    39      D  8       input       .     .    .A...
        NSTROBE   31    40      D  6     i/o pin    d-ff     1    ..B.D
           NERD   32    42      D  2     i/o pin    comb     1    .....
           NEWR   33    43      D  0     i/o pin    comb     1    .....
       _2_BUFQ3   34     6      A  4      buried    d-ff     1    ..B..
       _2_BUFQ2   35    18      B  0      buried    d-ff     1    .A...
       _2_BUFQ4   36    34      C  0      buried    d-ff     1    .A...
     _5_ICEHOLD   37    20      B  2      buried    d-ff     1    .A...
       _5_ACTRD   38    14      A 12      buried    comb     1    ..B..
      _5_IO34_I   39    36      C  2      buried    comb     1    ..B..
     _5_EPHOLDQ   40    24      B  6      buried    d-ff     1    ..B..
       _5_X29_D   41    26      B  8      buried    d-ff     1    ...C.
  _13_ICEACTIVE   42    16      A 14      buried    d-ff     2    ....D
    _13_SDESGN8   43    58      D  8      buried    comb     2    ....D
   _13_ESGN8ACT   44    38      C  4      buried    comb     1    ....D
   _13_PRTNDTVL   45    10      A  8      buried    d-ff     1    ....D
      _13_X17_Q   46    54      D  4      buried    d-ff     1    ...C.
    _13_ENRDNDT   47    28      B 10      buried    d-ff     1    .A...
     _13_RSICVL   48    40      C  6      buried    comb     1    .AB..
      _13_M47_O   49    30      B 12      buried    comb     1    ...C.
   _13_ICEVALID   50    42      C  8      buried    d-ff     1    ..B..
     _13_IO37_I   51    46      C 12      buried    comb     1    ...C.
.

 Key:
 P/N # - Pin/Node Number
 .?. - Signal Unplaced
 (Loc) - Macrocell Location (Block & Cell)
 # PT - Number of used product terms in logic
 Blocks- Device blocks driven by signal
 comb - Combinatorial logic function
 d-ff - D-Type Flip-flop
 t-ff - T-Type Flip-flop
 Note: Registered input storage equations (MACH-2xx family)
 ..... are realized with 0 array product terms.


*** Signals - Equations Where Used

   Signal Source                   Fanout List
           BUF0:       _2_BUFQ1          EPSGN8 
               {AA}
       _2_BUFQ1:       _2_BUFQ4 
               {C}
         EPSGN3:           ETB2      _5_EPHOLDQ 
               {AB}
         EPSGN8:      _5_IO34_I 
               {C}
           EPT5:   _13_ICEVALID      _13_RSICVL        _5_ACTRD 
               {CCA}
        EPSGN16:           QSMD 
               {A}
           EPT4:           QSMD 
               {A}
        EPSGN15:           QSMD 
               {A}
        ICECLK1:       _2_BUFQ1 
               {A}
           EPS0:      _13_X17_Q    _13_PRTNDTVL     _13_SDESGN8   _13_ICEACTIVE 
               :       _5_ACTRD          ESGN10           ESGN8 
               {DADA ADD}

           EPS1:      _13_X17_Q    _13_PRTNDTVL     _13_SDESGN8   _13_ICEACTIVE 
               :       _5_ACTRD          ESGN10           ESGN8 
               {DADA ADD}

           EPS2:      _13_X17_Q    _13_PRTNDTVL     _13_SDESGN8   _13_ICEACTIVE 
               :       _5_ACTRD          ESGN10           ESGN8 
               {DADA ADD}

           EPS3:      _13_X17_Q    _13_PRTNDTVL     _13_SDESGN8   _13_ICEACTIVE 
               :       _5_ACTRD          ESGN10           ESGN8 
               {DADA ADD}

        NICEBRK:        EPSGN18 
               {B}
           EPS7:       _5_X29_D 
               {B}
           EPS6:       _5_X29_D 
               {B}
            ES0:           NEWR           ESGN7 
               {DC}
            ES1:           NEWR            NERD           ESGN7 
               {DDC}
            ES2:          ESGN7 
               {C}
            ES3:          ESGN7 
               {C}
         EPSGN4:          ESGN7 
               {C}
          ESGN8:      _13_X17_Q          ESGN10     _13_ENRDNDT 
               {DDB}
          ESGN9:     _13_IO37_I 
               {C}
          ECTL3:         EPSGN8 
               {A}
        NSTROBE:           NEWR            NERD          ESGN10           ESGN9 
               :       _5_X29_D 
               {DDDD B}

       _2_BUFQ3:       _2_BUFQ2 
               {B}
       _2_BUFQ2:           ETB2 
               {A}
       _2_BUFQ4:       _2_BUFQ3            ETB2 
               {AA}
     _5_ICEHOLD:         EPSGN8 
               {A}
       _5_ACTRD:     _5_EPHOLDQ      _5_ICEHOLD 
               {BB}
      _5_IO34_I:     _5_EPHOLDQ 
               {B}
     _5_EPHOLDQ:     _5_ICEHOLD 
               {B}
       _5_X29_D:          EMPTY 
               {C}
  _13_ICEACTIVE:        NSTROBE 
               {D}
    _13_SDESGN8:          ESGN8 
               {D}
   _13_ESGN8ACT:    _13_SDESGN8           ESGN8 
               {DD}
   _13_PRTNDTVL:          ESGN9 
               {D}
      _13_X17_Q:   _13_ESGN8ACT 
               {C}
    _13_ENRDNDT:   _13_PRTNDTVL 
               {A}
     _13_RSICVL:    _13_ENRDNDT    _13_PRTNDTVL 
               {BA}
      _13_M47_O:     _13_RSICVL 
               {C}
   _13_ICEVALID:      _13_M47_O 
               {B}
     _13_IO37_I:   _13_ICEVALID 
               {C}



*** Outputs with no feedback

             QSMD            ETB2         EPSGN18           ESGN7           EMPTY 
           ESGN10            NERD            NEWR 


*** Feedback Map - eph215

 Gbl Inp .--.     I/O  .--+--A--+--.  I/O           I/O  .--+--B--+--.  I/O   
         | 0|  EPSGN15 : 0|     |21| EPS3        _5_ACTRD  0|     |21|        
         | 1|  ICECLK1 : 1|     |20|                EPS6 : 1|     |20| NICEBRK
         | 2|  _13_RSIC  2|     |19|             _13_RSIC  2|     |19|        
         | 3|  _5_ICEHO  3|     |18| EPSGN16             | 3|     |18|        
         | 4|  _2_BUFQ2  4|     |17|                EPS7 : 4|     |17|        
         | 5|  _2_BUFQ4  5|     |16|             NSTROBE : 5|     |16|        
         '--'     EPT5 : 6|     |15: EPSGN3      _5_IO34_  6|     |15: EPSGN3 
               _13_ENRD  7|     |14|                     | 7|     |14|        
                  EPS2 : 8|     |13: EPS0        _13_ICEV  8|     |13|        
                  BUF0 : 9|     |12: EPS1                | 9|     |12: ESGN8  
K:  * Used        EPT4 :10|     |11: ECTL3       _5_EPHOL 10|     |11: _2_BUFQ
    . Avail            '--+--C--+--'                     '--+--D--+--'        
    # N/A      _2_BUFQ1  0|     |21| _5_X29_     _13_ESGN  0|     |21| EPS3   
    0 RegIn    _13_IO37  1|     |20|             _13_ICEA  1|     |20|        
    - No.PT            | 2|     |19|             _13_PRTN  2|     |19|        
               _13_X17_  3|     |18|                     | 3|     |18|        
                 ESGN9 : 4|     |17| EPT5            ES0 : 4|     |17|        
                EPSGN8 : 5|     |16|             NSTROBE : 5|     |16|        
                   ES0 : 6|     |15: ES3           ESGN8 : 6|     |15|        
                   ES1 : 7|     |14|                 ES1 : 7|     |14|        
                   ES2 : 8|     |13|                EPS2 : 8|     |13|        
               _13_M47_  9|     |12|             _13_SDES  9|     |12: EPS1   
                EPSGN4 :10|     |11|                EPS0 :10|     |11|        
                       '--+-u--u+--'                     '--+-u--u+--'        



*** Logic Map - eph215

 Gbl Inp .--.     I/O  .--+--A--+--.  I/O           I/O  .--+--B--+--.  I/O   
         | 0|  _2_BUFQ1  0| 1  #|21|             _2_BUFQ2  0| 1  #|21|        
         | 1|          | 1| -  #|20|                     | 1| -  #|20|        
         | 2|     QSMD | 2| 1  #|19|             _5_ICEHO  2| 1  #|19|        
         | 3|          | 3| -  #|18|                     | 3| -  #|18|        
         | 4|  _2_BUFQ3  4| 1  #|17|             EPSGN18 | 4| 1  #|17|        
         | 5|          | 5| -  #|16|                     | 5| -  #|16|        
         '--'     ETB2 | 6| 1  -|15|             _5_EPHOL  6| 1  -|15|        
                       | 7| -  2|14| _13_ICE             | 7| -  .|14|        
               _13_PRTN  8| 1  -|13|             _5_X29_D  8| 1  -|13|        
                       | 9| -  1|12| _5_ACTR             | 9| -  1|12| _13_M47
K:  * Used      EPSGN8 |10| 2  -|11|             _13_ENRD 10| 1  -|11|        
    . Avail            '--+--C--+--'                     '--+--D--+--'        
    # N/A      _2_BUFQ4  0| 1  #|21|                NEWR | 0| 1  #|21|        
    0 RegIn            | 1| -  #|20|                     | 1| -  #|20|        
    - No.PT    _5_IO34_  2| 1  #|19|                NERD | 2| 1  #|19|        
                       | 3| -  #|18|                     | 3| -  #|18|        
               _13_ESGN  4| 1  #|17|             _13_X17_  4| 1  #|17|        
                       | 5| -  #|16|                     | 5| -  #|16|        
               _13_RSIC  6| 1  -|15|             NSTROBE | 6| 1  -|15|        
                       | 7| -  1|14| EMPTY               | 7| -  1|14| ESGN8  
               _13_ICEV  8| 1  -|13|             _13_SDES  8| 2  -|13|        
                       | 9| -  1|12| _13_IO3             | 9| -  1|12| ESGN9  
                 ESGN7 |10| 2  -|11|              ESGN10 |10| 1  -|11|        
                       '--+-u--u+--'                     '--+-u--u+--'        


*** Pin Map - eph215
                                                                   
                                                                   
                                                                   
                                                                   
                                   BUF0                            
                                QSMD  |        NEWR                
                                .  |  |        |  NERD             
                          ETB2  |  |  |        |  |  .             
                     EPSGN3  |  |  |  |        |  |  |  NSTROBE    
                          |  |  |  |  |        |  |  |  |          
                    .-----'--'--'--'--'--o-----'--'--'--'---.      
                    |                       4  4  4  4  4   |      
                    |     6  5  4  3  2  1  4  3  2  1  0   |      
              EPSGN8| 7                                   39|ECTL3 
                EPT5| 8                  G  V             38|ESGN10
             EPSGN16| 9                  n  c             37|ESGN9 
                EPT4|10                  d  c             36|ESGN8 
             EPSGN15|11                                   35|      
                Gnd |12            MACH-215               34| Gnd  
             ICECLK1|13                                   33|      
                EPS0|14             V  G                  32|      
                EPS1|15             c  n                  31|EMPTY 
                EPS2|16             c  d                  30|      
                EPS3|17                                   29|ESGN7 
                    |   1  1  2  2  2  2  2  2  2  2  2     |      
                    |   8  9  0  1  2  3  4  5  6  7  8     |      
                    '---.--.--.--.--------.--.--.--.--.-----'      
                        |  |  |  |        |  |  |  |  |            
                  NICEBRK  |  |  |        |  |  |  |  EPSGN4       
                     EPSGN18  |  |        |  |  |  ES3             
                           EPS7  |        |  |  ES2                
                              EPS6        |  ES1                   
                                          ES0                      
The Jedec Data is  stored in ===> EPH215.jed
The Placements are stored in ===> EPH215.plc
The Design Doc is  stored in ===> EPH215.rpt
 
%% FITR %% Error Count: 0, Warning Count: 5
%% FITR %% File Processed Successfully. - File: EPH215.PDS
 
