PALASM 4 v1.5 MACH FITR - MARKET RELEASE (7-24-92)
 (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1990,91,92

 
Reading User Design (TRE File)...
User Logic Pre-Placements... (PLC File)
 
Reading Device Database ...

***********************************************************************
     Mach PLD Fitter - v 1.67          The MACH210 on target header
***********************************************************************

PAIR Analysis...

Pre-Placement & Equation Usage Checks... 
 





*** Timing Analysis for Signals

 Parameter   Min   Max           Signal List (Those having Max delay.)
      Tpd     1     1             ENEPWR            ETB1         EPSGN18 
                                    BUF0 
      Tsu     1     1      _12_M5_REGOUT   _12_M1_REGOUT         _3_SQD0 
                           _21_M6_REGOUT   _21_M5_REGOUT   _21_M8_REGOUT 
                           _21_M4_REGOUT   _12_M8_REGOUT 
      Tco     0     1               BUF0         EPSGN18 
      Tcr     1     1            _3_SQD1            ENT0         _3_SQD2 
                                    ENT1         _3_SQD3            ENT2 
                                 _3_SQD4          ECTL14 
.

 Key:
 Tpd - Combinatorial propagation delay, input to output
 Tsu - Combinatorial setup delay before clock
 Tco - clock to output (register output to combinatorial output)
 Tcr - Clock to register setup delay
.......(Register output thru combinatorial logic to reg input)
 All delay values are expressed in terms of array passes




*** Device Resource Checks

                Available        Used        Remaining
        Clocks:     2              2              0
          Pins:    38             33              5     ->    86%
     I/O Macro:    32             19             13
   Total Macro:    64             52             12
 Product Terms:   256             75             48     ->    80%
 
MACH-PLD Resource Checks OK!  



Partitioning Design into Blocks...

|> ERROR F740 - Resource violation in preplacement: (IO Pins) - Block A

|> INFORMATION F085 - Intermediate Error Count: 1, Warning Count: 0
|> INFORMATION F075 - Redo Partitioning with Max Packing Flag=True 



|> INFORMATION F050 - Device Utilization.............. *: 80 %



*** Block Partitioning Results

               Array   Product     # I/O    Buried    Signal    Macros
              Inputs    Terms      Macro     Logic    Fanout    Remain
   Block-> A    17        48         8*        4         7         4
   Block-> B    18        64*        7         9         9         0
   Block-> C    17        64*        3        13        25         0
   Block-> D    14        32         1         7         7         8



*** Block Signal List

Blk-> A        _2_BUF1  1       _3_SQD15  3       _3_SQD14  3       _3_SQD13  3
                  BUF0  2         ENEPWR  4           ENT2  1           ENT3  1
                  ENT4  1           ENT5  1        EPSGN13  1           ETB1  4

Blk-> B  _21_M5_REGOUT  2  _21_M8_REGOUT  2  _21_M4_REGOUT  2  _21_M3_REGOUT  2
         _21_M2_REGOUT  2  _21_M1_REGOUT  2     _10_M14_QH  2  _12_M6_REGOUT  2
         _12_M1_REGOUT  2           ENT1  1           ENT8  1           ENT6  1
                  ENT7  1        EPSGN18  2        EPSGN12  1        EPSGN16  1

Blk-> C       _3_SDQ12  3       _3_SQD11  3       _3_SQD10  3        _3_SQD9  3
               _3_SQD8  3        _3_SQD7  3        _3_SQD6  3        _3_SQD5  3
               _3_SQD4  3        _3_SQD3  3        _3_SQD2  3        _3_SQD1  3
               _3_SQD0  3         ECTL14  2        SPOUT14  1           ENT0  1

Blk-> D  _21_M6_REGOUT  2  _12_M5_REGOUT  3  _12_M8_REGOUT  3  _12_M4_REGOUT  3
         _12_M3_REGOUT  3  _12_M2_REGOUT  3        _2_ENT9  1        SPOUT15  1



*** Block Input List

Blk-> A           BUF2  1         EPSGN4  2         ECTL18  2         ECTL17  2
                ECTL16  3          ETB12  1         EPSGN0  1        _3_SQD2  1
               _3_SQD3  1        _3_SQD4  1        _3_SQD5  1       _3_SQD10  1
               _2_ENT9  1       _3_SDQ12  2       _3_SQD13  1       _3_SQD14  1
              _3_SQD15  0

Singular:           BUF2{         ENEPWR}          ETB12{           BUF0}
                  EPSGN0{           ETB1}        _3_SQD2{           ENT2}
                 _3_SQD3{           ENT3}        _3_SQD4{           ENT4}
                 _3_SQD5{           ENT5}       _3_SQD10{        EPSGN13}
                 _2_ENT9{           BUF0}       _3_SQD13{       _3_SQD14}
                _3_SQD14{       _3_SQD15}


Blk-> B           ETB4  1          ECTL2  1         ECTL16  9        _3_SQD1  1
               _3_SQD6  1        _3_SQD7  1        _3_SQD8  1       _3_SQD11  1
              _3_SQD13  1        _2_BUF1  1  _12_M5_REGOUT  1  _12_M6_REGOUT  1
            _10_M14_QH  1  _21_M1_REGOUT  1  _21_M2_REGOUT  1  _21_M3_REGOUT  1
         _21_M4_REGOUT  1  _21_M8_REGOUT  1

Singular:           ETB4{  _12_M1_REGOUT}          ECTL2{        EPSGN18}
                 _3_SQD1{           ENT1}        _3_SQD6{           ENT6}
                 _3_SQD7{           ENT7}        _3_SQD8{           ENT8}
                _3_SQD11{        EPSGN12}       _3_SQD13{        EPSGN16}
                 _2_BUF1{        EPSGN18}  _12_M5_REGOUT{  _12_M6_REGOUT}
           _12_M6_REGOUT{     _10_M14_QH}     _10_M14_QH{  _21_M1_REGOUT}
           _21_M1_REGOUT{  _21_M2_REGOUT}  _21_M2_REGOUT{  _21_M3_REGOUT}
           _21_M3_REGOUT{  _21_M4_REGOUT}  _21_M4_REGOUT{  _21_M8_REGOUT}
           _21_M8_REGOUT{  _21_M5_REGOUT}


Blk-> C         ECTL13  1         ECTL16 14        _3_SQD0  2        _3_SQD1  1
               _3_SQD2  1        _3_SQD3  1        _3_SQD4  1        _3_SQD5  1
               _3_SQD6  1        _3_SQD7  1        _3_SQD8  1        _3_SQD9  1
              _3_SQD10  1       _3_SQD11  1       _3_SDQ12  0       _3_SQD14  1
         _21_M6_REGOUT  1

Singular:         ECTL13{        _3_SQD0}        _3_SQD1{        _3_SQD2}
                 _3_SQD2{        _3_SQD3}        _3_SQD3{        _3_SQD4}
                 _3_SQD4{        _3_SQD5}        _3_SQD5{        _3_SQD6}
                 _3_SQD6{        _3_SQD7}        _3_SQD7{        _3_SQD8}
                 _3_SQD8{        _3_SQD9}        _3_SQD9{       _3_SQD10}
                _3_SQD10{       _3_SQD11}       _3_SQD11{       _3_SDQ12}
                _3_SQD14{        SPOUT14}  _21_M6_REGOUT{         ECTL14}
         

Blk-> D           BUF2  1         ECTL16  6          EPT21  1          ETB12  1
                 EPT22  1         TGTVCC  1        _3_SQD9  1       _3_SQD15  1
         _12_M1_REGOUT  1  _12_M2_REGOUT  1  _12_M3_REGOUT  1  _12_M4_REGOUT  1
         _12_M8_REGOUT  1  _21_M5_REGOUT  1

Singular:           BUF2{  _12_M5_REGOUT}          EPT21{  _12_M2_REGOUT}
                   ETB12{  _12_M4_REGOUT}          EPT22{  _12_M3_REGOUT}
                  TGTVCC{  _12_M8_REGOUT}        _3_SQD9{        _2_ENT9}
                _3_SQD15{        SPOUT15}  _12_M1_REGOUT{  _12_M2_REGOUT}
           _12_M2_REGOUT{  _12_M3_REGOUT}  _12_M3_REGOUT{  _12_M4_REGOUT}
           _12_M4_REGOUT{  _12_M8_REGOUT}  _12_M8_REGOUT{  _12_M5_REGOUT}
           _21_M5_REGOUT{  _21_M6_REGOUT}


|> INFORMATION F070 - Multiple Assignment Mode - Repeat Count: 4
Assigning Resources...


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=False         Expand All=False



*** Macro Block C

        SPOUT14 (C  2)
         ECTL14 (C 14)
           ENT0 (C  0)
       _3_SDQ12 (C  1) -> (A  8) (C  8)
       _3_SQD11 (C  3) -> (B 10) (C 10)
       _3_SQD10 (C  5) -> (A  1) (C  1)
        _3_SQD0 (C 10) -> (C  7)
        _3_SQD9 (C  7) -> (C  3) (D  3)
        _3_SQD8 (C  9) -> (B  9) (C  9)
        _3_SQD7 (C 11) -> (B 19) (C 19)
        _3_SQD6 (C 13) -> (B 21) (C 21)
        _3_SQD5 (C 15) -> (A  4) (C  4)
        _3_SQD4 (C  4) -> (A  0) (C  0)
        _3_SQD3 (C  6) -> (A  2) (C  2)
        _3_SQD2 (C  8) -> (A  6) (C  6)
        _3_SQD1 (C 12) -> (B 14) (C 14)



*** Macro Block B

        EPSGN18 (B 10)
           ENT6 (B  4)
           ENT8 (B  2)
           ENT7 (B  6)
        EPSGN12 (B 12)
        EPSGN16 (B 14)
           ENT1 (B  0)
  _12_M1_REGOUT (B  7) -> (D  0)
  _21_M5_REGOUT (B  1) ->   Blocked -> No Reshuffle Possible

|> ERROR F595 - Connection not available for User Preplacement - _21_M5_REGOUT

  _21_M4_REGOUT (B  5) -> (B 13)
  _21_M3_REGOUT (B  9) -> (B  6)
  _21_M2_REGOUT (B 11) -> (B  8)
  _21_M1_REGOUT (B 13) -> (B 15)
  _21_M8_REGOUT (B  3) -> (B  7)
  _12_M6_REGOUT (B  8) -> (B  3)
     _10_M14_QH (B 15) -> (B  1)



*** Macro Block A

           ETB1 (A  0)
           BUF0 (A 14)
         ENEPWR (A 12)
           ENT5 (A  4)
        EPSGN13 (A  2)
           ENT2 (A 10)
           ENT3 (A  8)
           ENT4 (A  6)
        _2_BUF1 (A  1) -> (B  2)
       _3_SQD13 (A  3) -> (A 16) (B  4)
       _3_SQD14 (A  5) -> (A 18) (C 18)
       _3_SQD15 (A  7) -> (A 20) (D  8)



*** Macro Block D

        SPOUT15 (D  2)
  _12_M2_REGOUT (D  3) -> (D 12)
  _12_M3_REGOUT (D  5) -> (D  4)
  _12_M4_REGOUT (D  7) ->   Blocked -> No Reshuffle Possible

|> ERROR F595 - Connection not available for User Preplacement - _12_M4_REGOUT

  _12_M5_REGOUT (D 11) -> (B 18)
  _21_M6_REGOUT (D 13) -> (C  5)
  _12_M8_REGOUT (D  9) -> (D  1)
        _2_ENT9 (D  0) -> (A 10)



*** Macro Block Inputs

           BUF2 (I  0) -> (A 12) (D  2)
           ETB4 (I  1) -> (B  0)
          ECTL2 (I  3) ->   Blocked -> Reshuffling SwMtrx
     _10_M14_QH -> (B 17)    Moved. -> Reshuffling SwMtrx
        _3_SQD1 -> (B  1)    Moved. -> Reshuffling SwMtrx
        _2_BUF1 -> (B 14)    Moved. -> Reshuffling SwMtrx
        _3_SQD6 -> (B  2)    Moved. -> Reshuffling SwMtrx
  _12_M6_REGOUT -> (B 21)    Moved.
          ECTL2 -> (B  3)
         ECTL13 (I  4) -> (C 11)
         ECTL16 (I  5) -> (A  5) (B  5) (C 13) (D  5)

         EPSGN0 (D  0) -> (A  7)
         TGTVCC (D  8) -> (D 11)
         EPSGN4 (B  8) -> (A 21)
          EPT22 (D 10) ->   Blocked -> Reshuffling SwMtrx
        _3_SQD9 -> (D 21)    Moved.
          EPT22 -> (D  3)
         ECTL18 (C 10) -> (A 17)
          ETB12 (D 12) -> (A 13) (D 13)
         ECTL17 (C 12) ->   Blocked -> Reshuffling SwMtrx
       _3_SQD10 -> (A 19)    Moved.
         ECTL17 -> (A  1)
          EPT21 (D 14) -> (D 14)





Wiring Completion:   98% -> (  2 nc)

*** Physical Signal Placements

           ETB1  (A  0)         EPSGN13  (A  2)            ENT5  (A  4) 
           ENT4  (A  6)            ENT3  (A  8)            ENT2  (A 10) 
         ENEPWR  (A 12)            BUF0  (A 14)            BUF2  (I  0) 
           ETB4  (I  1)          ECTL15  (I  2)         EPSGN16  (B 14) 
        EPSGN12  (B 12)         EPSGN18  (B 10)          EPSGN4  (B  8) 
           ENT7  (B  6)            ENT6  (B  4)            ENT8  (B  2) 
           ENT1  (B  0)            ENT0  (C  0)         SPOUT14  (C  2) 
         ECTL18  (C 10)          ECTL17  (C 12)          ECTL14  (C 14) 
          ECTL2  (I  3)          ECTL13  (I  4)          ECTL16  (I  5) 
          EPT21  (D 14)           ETB12  (D 12)           EPT22  (D 10) 
         TGTVCC  (D  8)         SPOUT15  (D  2)          EPSGN0  (D  0) 
        _3_SQD0  (C 10)         _3_SQD1  (C 12)         _3_SQD2  (C  8) 
        _3_SQD3  (C  6)         _3_SQD4  (C  4)         _3_SQD5  (C 15) 
        _3_SQD6  (C 13)         _3_SQD7  (C 11)         _3_SQD8  (C  9) 
        _3_SQD9  (C  7)        _3_SQD10  (C  5)        _3_SQD11  (C  3) 
        _2_ENT9  (D  0)        _3_SDQ12  (C  1)        _3_SQD13  (A  3) 
       _3_SQD14  (A  5)        _3_SQD15  (A  7)         _2_BUF1  (A  1) 
  _12_M1_REGOUT  (B  7)   _12_M2_REGOUT  (D  3)   _12_M3_REGOUT  (D  5) 
  _12_M4_REGOUT  (D  7)   _12_M8_REGOUT  (D  9)   _12_M5_REGOUT  (D 11) 
  _12_M6_REGOUT  (B  8)      _10_M14_QH  (B 15)   _21_M1_REGOUT  (B 13) 
  _21_M2_REGOUT  (B 11)   _21_M3_REGOUT  (B  9)   _21_M4_REGOUT  (B  5) 
  _21_M8_REGOUT  (B  3)   _21_M5_REGOUT  (B  1)   _21_M6_REGOUT  (D 13) 
Assigning Resources...
|> INFORMATION F085 - Intermediate Error Count: 2, Warning Count: 0


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=True          Expand All=False



*** Macro Block C

           ENT0 (C  0)
        SPOUT14 (C  2)
         ECTL14 (C 14)
       _3_SDQ12 (C  1) -> (A  8) (C  8)
       _3_SQD11 (C  3) -> (B 10) (C 10)
        _3_SQD4 (C  4) -> (A  0) (C  0)
       _3_SQD10 (C  5) -> (A  1) (C  1)
        _3_SQD3 (C  6) -> (A  2) (C  2)
        _3_SQD9 (C  7) -> (C  3) (D  3)
        _3_SQD2 (C  8) -> (A  6) (C  6)
        _3_SQD8 (C  9) -> (B  9) (C  9)
        _3_SQD0 (C 10) -> (C  7)
        _3_SQD7 (C 11)?
        _3_SQD1 (C 12) -> (B  1) (C 14)
        _3_SQD6 (C 13)?
        _3_SQD5 (C 15) -> (A  4) (C  4)
        _3_SQD7 (C 11) -> (B  0) (C 19)
        _3_SQD6 (C 13) -> (B  2) (C 21)



*** Macro Block B

        EPSGN18 (B 10)
           ENT1 (B  0)
           ENT8 (B  2)
           ENT6 (B  4)
           ENT7 (B  6)
        EPSGN12 (B 12)
        EPSGN16 (B 14)
  _21_M5_REGOUT (B  1) -> (D  5)
  _21_M8_REGOUT (B  3) -> (B  7)
  _21_M4_REGOUT (B  5) -> (B 16)
  _12_M1_REGOUT (B  7) -> (D  0)
  _12_M6_REGOUT (B  8) -> (B  3)
  _21_M3_REGOUT (B  9) -> (B  6)
  _21_M2_REGOUT (B 11) -> (B  8)
  _21_M1_REGOUT (B 13) -> (B 15)
     _10_M14_QH (B 15) -> (B 17)



*** Macro Block A

           ETB1 (A  0)
         ENEPWR (A 12)
           BUF0 (A 14)
        EPSGN13 (A  2)
           ENT5 (A  4)
           ENT4 (A  6)
           ENT3 (A  8)
           ENT2 (A 10)
        _2_BUF1 (A  1) -> (B 14)
       _3_SQD13 (A  3) -> (A 16) (B  4)
       _3_SQD14 (A  5) -> (A 18) (C 18)
       _3_SQD15 (A  7) -> (A 20) (D  8)



*** Macro Block D

        SPOUT15 (D  2)
        _2_ENT9 (D  0) -> (A 10)
  _12_M2_REGOUT (D  3) -> (D  2)
  _12_M3_REGOUT (D  5) -> (D  4)
  _12_M4_REGOUT (D  7) -> (D  6)
  _12_M8_REGOUT (D  9) -> (D  1)
  _12_M5_REGOUT (D 11) -> (B 18)
  _21_M6_REGOUT (D 13) -> (C  5)



*** Macro Block Inputs

           BUF2 (I  0) -> (A 12) (D 10)
           ETB4 (I  1)?
          ECTL2 (I  3)?
         ECTL13 (I  4) -> (C 11)
         ECTL16 (I  5) -> (A  5) (B  5) (C 13) (D 13)
           ETB4 (I  1) ->   Blocked -> Reshuffling SwMtrx
        _3_SQD7 -> (B 19)    Moved.
           ETB4 -> (B  0)
          ECTL2 (I  3) ->   Blocked -> Reshuffling SwMtrx
  _21_M2_REGOUT -> (B 13)    Moved. -> Reshuffling SwMtrx
         ECTL16 -> (B  8)    Moved. -> Reshuffling SwMtrx
  _12_M6_REGOUT -> (B  5)    Moved.
          ECTL2 -> (B  3)

         EPSGN0 (D  0) -> (A  7)
         TGTVCC (D  8) -> (D 11)
         EPSGN4 (B  8) -> (A 21)
          EPT22 (D 10) -> (D 12)
         ECTL18 (C 10) -> (A 17)
          ETB12 (D 12) -> (A 13) (D 16)
         ECTL17 (C 12)?
          EPT21 (D 14) -> (D 14)
         ECTL17 (C 12) ->   Blocked -> Reshuffling SwMtrx
       _3_SQD10 -> (A 19)    Moved.
         ECTL17 -> (A  1)





Wiring Completion:  100% -> (  0 nc)

|> INFORMATION F058 - Total Block Fanout (All Signals) *: 66 


*** Signals - Tabular Information

          Signal   #   P/N #   (Loc)      Type     Logic  # PT    Blocks
           ETB1    1     2      A  0     i/o pin    comb     2    .....
        EPSGN13    2     3      A  2     i/o pin    d-ff     1    .....
           ENT5    3     4      A  4     i/o pin    d-ff     1    .....
           ENT4    4     5      A  6     i/o pin    d-ff     1    .....
           ENT3    5     6      A  8     i/o pin    d-ff     1    .....
           ENT2    6     7      A 10     i/o pin    d-ff     1    .....
         ENEPWR    7     8      A 12     i/o pin    comb     2    .....
           BUF0    8     9      A 14     i/o pin    comb     1    .....
           BUF2    9    10      I  0       input       .     .    .A..D
           ETB4   10    11      I  1       input       .     .    ..B..
         ECTL15   11    13      I  2   clock pin       .     .    .....
        EPSGN16   12    14      B 14     i/o pin    d-ff     1    .....
        EPSGN12   13    15      B 12     i/o pin    d-ff     1    .....
        EPSGN18   14    16      B 10     i/o pin    comb     1    .....
         EPSGN4   15    17      B  8       input       .     .    .A...
           ENT7   16    18      B  6     i/o pin    d-ff     1    .....
           ENT6   17    19      B  4     i/o pin    d-ff     1    .....
           ENT8   18    20      B  2     i/o pin    d-ff     1    .....
           ENT1   19    21      B  0     i/o pin    d-ff     1    .....
           ENT0   20    24      C  0     i/o pin    d-ff     1    .....
        SPOUT14   21    25      C  2     i/o pin    d-ff     1    .....
         ECTL18   22    29      C 10       input       .     .    .A...
         ECTL17   23    30      C 12       input       .     .    .A...
         ECTL14   24    31      C 14     i/o pin    d-ff     1    .....
          ECTL2   25    32      I  3       input       .     .    ..B..
         ECTL13   26    33      I  4       input       .     .    ...C.
         ECTL16   27    35      I  5   clock pin       .     .    .ABCD
          EPT21   28    36      D 14       input       .     .    ....D
          ETB12   29    37      D 12       input       .     .    .A..D
          EPT22   30    38      D 10       input       .     .    ....D
         TGTVCC   31    39      D  8       input       .     .    ....D
        SPOUT15   32    42      D  2     i/o pin    d-ff     1    .....
         EPSGN0   33    43      D  0       input       .     .    .A...
        _3_SQD0   34    44      C 10      buried    d-ff     2    ...C.
        _3_SQD1   35    46      C 12      buried    d-ff     2    ..BC.
        _3_SQD2   36    42      C  8      buried    d-ff     2    .A.C.
        _3_SQD3   37    40      C  6      buried    d-ff     2    .A.C.
        _3_SQD4   38    38      C  4      buried    d-ff     2    .A.C.
        _3_SQD5   39    49      C 15      buried    d-ff     2    .A.C.
        _3_SQD6   40    47      C 13      buried    d-ff     2    ..BC.
        _3_SQD7   41    45      C 11      buried    d-ff     2    ..BC.
        _3_SQD8   42    43      C  9      buried    d-ff     2    ..BC.
        _3_SQD9   43    41      C  7      buried    d-ff     2    ...CD
       _3_SQD10   44    39      C  5      buried    d-ff     2    .A.C.
       _3_SQD11   45    37      C  3      buried    d-ff     2    ..BC.
        _2_ENT9   46    50      D  0      buried    d-ff     1    .A...
       _3_SDQ12   47    35      C  1      buried    d-ff     2    .A.C.
       _3_SQD13   48     5      A  3      buried    d-ff     2    .AB..
       _3_SQD14   49     7      A  5      buried    d-ff     2    .A.C.
       _3_SQD15   50     9      A  7      buried    d-ff     2    .A..D
        _2_BUF1   51     3      A  1      buried    d-ff     1    ..B..
  _12_M1_REGOUT   52    25      B  7      buried    d-ff     1    ....D
  _12_M2_REGOUT   53    53      D  3      buried    d-ff     2    ....D
  _12_M3_REGOUT   54    55      D  5      buried    d-ff     2    ....D
  _12_M4_REGOUT   55    57      D  7      buried    d-ff     2    ....D
  _12_M8_REGOUT   56    59      D  9      buried    d-ff     2    ....D
  _12_M5_REGOUT   57    61      D 11      buried    d-ff     2    ..B..
  _12_M6_REGOUT   58    26      B  8      buried    d-ff     1    ..B..
     _10_M14_QH   59    33      B 15      buried    d-ff     1    ..B..
  _21_M1_REGOUT   60    31      B 13      buried    d-ff     1    ..B..
  _21_M2_REGOUT   61    29      B 11      buried    d-ff     1    ..B..
  _21_M3_REGOUT   62    27      B  9      buried    d-ff     1    ..B..
  _21_M4_REGOUT   63    23      B  5      buried    d-ff     1    ..B..
  _21_M8_REGOUT   64    21      B  3      buried    d-ff     1    ..B..
  _21_M5_REGOUT   65    19      B  1      buried    d-ff     1    ....D
  _21_M6_REGOUT   66    63      D 13      buried    d-ff     1    ...C.
.

 Key:
 P/N # - Pin/Node Number
 .?. - Signal Unplaced
 (Loc) - Macrocell Location (Block & Cell)
 # PT - Number of used product terms in logic
 Blocks- Device blocks driven by signal
 comb - Combinatorial logic function
 d-ff - D-Type Flip-flop
 t-ff - T-Type Flip-flop
 Note: Registered input storage equations (MACH-2xx family)
 ..... are realized with 0 array product terms.


*** Signals - Equations Where Used

   Signal Source                   Fanout List

           BUF2:  _12_M5_REGOUT          ENEPWR 
               {DA}
           ETB4:  _12_M1_REGOUT 
               {B}
         EPSGN4:         ENEPWR            ETB1 
               {AA}
         ECTL18:         ENEPWR            ETB1 
               {AA}
         ECTL17:         ENEPWR            ETB1 
               {AA}
          ECTL2:        EPSGN18 
               {B}
         ECTL13:        _3_SQD0 
               {C}
         ECTL16:  _21_M6_REGOUT   _21_M5_REGOUT   _21_M8_REGOUT   _21_M4_REGOUT 
               :  _21_M3_REGOUT   _21_M2_REGOUT   _21_M1_REGOUT      _10_M14_QH 
               :  _12_M6_REGOUT   _12_M5_REGOUT   _12_M8_REGOUT   _12_M4_REGOUT 
               :  _12_M3_REGOUT   _12_M2_REGOUT   _12_M1_REGOUT        _3_SQD15 
               :       _3_SQD14        _3_SQD13        _3_SDQ12        _3_SQD11 
               :       _3_SQD10         _3_SQD9         _3_SQD8         _3_SQD7 
               :        _3_SQD6         _3_SQD5         _3_SQD4         _3_SQD3 
               :        _3_SQD2         _3_SQD1         _3_SQD0          ECTL14 
               {DBBB BBBB BDDD DDBA AACC CCCC CCCC CCCC}

          EPT21:  _12_M2_REGOUT 
               {D}
          ETB12:  _12_M4_REGOUT            BUF0 
               {DA}
          EPT22:  _12_M3_REGOUT 
               {D}
         TGTVCC:  _12_M8_REGOUT 
               {D}
         EPSGN0:           ETB1 
               {A}
        _3_SQD0:        _3_SQD1         _3_SQD0            ENT0 
               {CCC}
        _3_SQD1:        _3_SQD2         _3_SQD1            ENT1 
               {CCB}
        _3_SQD2:        _3_SQD3         _3_SQD2            ENT2 
               {CCA}
        _3_SQD3:        _3_SQD4         _3_SQD3            ENT3 
               {CCA}
        _3_SQD4:        _3_SQD5         _3_SQD4            ENT4 
               {CCA}
        _3_SQD5:        _3_SQD6         _3_SQD5            ENT5 
               {CCA}
        _3_SQD6:        _3_SQD7         _3_SQD6            ENT6 
               {CCB}
        _3_SQD7:        _3_SQD8         _3_SQD7            ENT7 
               {CCB}
        _3_SQD8:        _3_SQD9         _3_SQD8            ENT8 
               {CCB}
        _3_SQD9:        _2_ENT9        _3_SQD10         _3_SQD9 
               {DCC}
       _3_SQD10:       _3_SQD11        _3_SQD10         EPSGN13 
               {CCA}
       _3_SQD11:       _3_SDQ12        _3_SQD11         EPSGN12 
               {CCB}
        _2_ENT9:           BUF0 
               {A}
       _3_SDQ12:        _2_BUF1        _3_SQD13        _3_SDQ12 
               {AAC}
       _3_SQD13:       _3_SQD14        _3_SQD13         EPSGN16 
               {AAB}
       _3_SQD14:       _3_SQD15        _3_SQD14         SPOUT14 
               {AAC}
       _3_SQD15:       _3_SQD15         SPOUT15 
               {AD}
        _2_BUF1:        EPSGN18 
               {B}
  _12_M1_REGOUT:  _12_M2_REGOUT 
               {D}
  _12_M2_REGOUT:  _12_M3_REGOUT 
               {D}
  _12_M3_REGOUT:  _12_M4_REGOUT 
               {D}
  _12_M4_REGOUT:  _12_M8_REGOUT 
               {D}
  _12_M8_REGOUT:  _12_M5_REGOUT 
               {D}
  _12_M5_REGOUT:  _12_M6_REGOUT 
               {B}
  _12_M6_REGOUT:     _10_M14_QH 
               {B}
     _10_M14_QH:  _21_M1_REGOUT 
               {B}
  _21_M1_REGOUT:  _21_M2_REGOUT 
               {B}
  _21_M2_REGOUT:  _21_M3_REGOUT 
               {B}
  _21_M3_REGOUT:  _21_M4_REGOUT 
               {B}
  _21_M4_REGOUT:  _21_M8_REGOUT 
               {B}
  _21_M8_REGOUT:  _21_M5_REGOUT 
               {B}
  _21_M5_REGOUT:  _21_M6_REGOUT 
               {D}
  _21_M6_REGOUT:         ECTL14 
               {C}



*** Outputs with no feedback

             ETB1         EPSGN13            ENT5            ENT4            ENT3 
             ENT2          ENEPWR            BUF0         EPSGN16         EPSGN12 
          EPSGN18            ENT7            ENT6            ENT8            ENT1 
             ENT0         SPOUT14          ECTL14         SPOUT15 


*** Feedback Map - The MACH210 on target header

 Gbl Inp .--.     I/O  .--+--A--+--.  I/O           I/O  .--+--B--+--.  I/O   
         | 0|  _3_SQD4 : 0|     |21| EPSGN4         ETB4 : 0|     |21|        
         | 1|   ECTL17 : 1|     |20| _3_SQD1     _3_SQD1 : 1|     |20|        
         | 2|  _3_SQD3 : 2|     |19| _3_SQD1     _3_SQD6 : 2|     |19| _3_SQD7
         | 3|          | 3|     |18| _3_SQD1       ECTL2 : 3|     |18| _12_M5_
         | 4|  _3_SQD5 : 4|     |17| ECTL18      _3_SQD13  4|     |17| _10_M14
         | 5|   ECTL16 : 5|     |16| _3_SQD1     _12_M6_R  5|     |16| _21_M4_
         '--'  _3_SQD2 : 6|     |15|             _21_M3_R  6|     |15: _21_M1_
                EPSGN0 : 7|     |14|             _21_M8_R  7|     |14: _2_BUF1
               _3_SDQ12  8|     |13: ETB12        ECTL16 : 8|     |13: _21_M2_
                       | 9|     |12: BUF2        _3_SQD8 : 9|     |12|        
K:  * Used     _2_ENT9 :10|     |11|             _3_SQD11 10|     |11|        
    . Avail            '--+--C--+--'                     '--+--D--+--'        
    # N/A      _3_SQD4 : 0|     |21| _3_SQD6     _12_M1_R  0|     |21|        
    0 RegIn    _3_SQD10  1|     |20|             _12_M8_R  1|     |20|        
               _3_SQD3 : 2|     |19| _3_SQD7     _12_M2_R  2|     |19|        
               _3_SQD9 : 3|     |18| _3_SQD1     _3_SQD9 : 3|     |18|        
               _3_SQD5 : 4|     |17|             _12_M3_R  4|     |17|        
               _21_M6_R  5|     |16|             _21_M5_R  5|     |16| ETB12  
               _3_SQD2 : 6|     |15|             _12_M4_R  6|     |15|        
               _3_SQD0 : 7|     |14: _3_SQD1             | 7|     |14: EPT21  
               _3_SDQ12  8|     |13: ECTL16      _3_SQD15  8|     |13: ECTL16 
               _3_SQD8 : 9|     |12|                     | 9|     |12: EPT22  
               _3_SQD11 10|     |11: ECTL13         BUF2 :10|     |11: TGTVCC 
                       '--+-u--u+--'                     '--+-u--u+--'        



*** Logic Map - The MACH210 on target header

 Gbl Inp .--.     I/O  .--+--A--+--.  I/O           I/O  .--+--B--+--.  I/O   
         | 0|     ETB1 | 0| 2  #|21|                ENT1 | 0| 1  #|21|        
         | 1|  _2_BUF1 | 1| 1  #|20|             _21_M5_R  1| 1  #|20|        
         | 2|  EPSGN13 | 2| 1  #|19|                ENT8 | 2| 1  #|19|        
         | 3|  _3_SQD13  3| 2  #|18|             _21_M8_R  3| 1  #|18|        
         | 4|     ENT5 | 4| 1  #|17|                ENT6 | 4| 1  #|17|        
         | 5|  _3_SQD14  5| 2  #|16|             _21_M4_R  5| 1  #|16|        
         '--'     ENT4 | 6| 1  .|15|                ENT7 | 6| 1  1|15| _10_M14
               _3_SQD15  7| 2  1|14| BUF0        _12_M1_R  7| 1  1|14| EPSGN16
                  ENT3 | 8| 1  .|13|             _12_M6_R  8| 1  1|13| _21_M1_
                       | 9| .  2|12| ENEPWR      _21_M3_R  9| 1  1|12| EPSGN12
K:  * Used        ENT2 |10| 1  .|11|             EPSGN18 |10| 1  1|11| _21_M2_
    . Avail            '--+--C--+--'                     '--+--D--+--'        
    # N/A         ENT0 | 0| 1  #|21|             _2_ENT9 | 0| 1  #|21|        
    0 RegIn    _3_SDQ12  1| 2  #|20|                     | 1| .  #|20|        
               SPOUT14 | 2| 1  #|19|             SPOUT15 | 2| 1  #|19|        
               _3_SQD11  3| 2  #|18|             _12_M2_R  3| 2  #|18|        
               _3_SQD4 | 4| 2  #|17|                     | 4| .  #|17|        
               _3_SQD10  5| 2  #|16|             _12_M3_R  5| 2  #|16|        
               _3_SQD3 | 6| 2  2|15| _3_SQD5             | 6| .  .|15|        
               _3_SQD9 | 7| 2  1|14| ECTL14      _12_M4_R  7| 2  .|14|        
               _3_SQD2 | 8| 2  2|13| _3_SQD6             | 8| .  1|13| _21_M6_
               _3_SQD8 | 9| 2  2|12| _3_SQD1     _12_M8_R  9| 2  .|12|        
               _3_SQD0 |10| 2  2|11| _3_SQD7             |10| .  2|11| _12_M5_
                       '--+-u--u+--'                     '--+-u--u+--'        


*** Pin Map - The MACH210 on target header
                                                                   
                                                                   
                                                                   
                                                                   
                                   ETB1                            
                             EPSGN13  |        EPSGN0              
                             ENT5  |  |        |  SPOUT15          
                          ENT4  |  |  |        |  |  .             
                       ENT3  |  |  |  |        |  |  |  .          
                          |  |  |  |  |        |  |  |  |          
                    .-----'--'--'--'--'--o-----'--'--'--'---.      
                    |                       4  4  4  4  4   |      
                    |     6  5  4  3  2  1  4  3  2  1  0   |      
                ENT2| 7                                   39|TGTVCC
              ENEPWR| 8                  G  V             38|EPT22 
                BUF0| 9                  n  c             37|ETB12 
                BUF2|10                  d  c             36|EPT21 
                ETB4|11                                   35|ECTL16
                Gnd |12            MACH-210               34| Gnd  
              ECTL15|13                                   33|ECTL13
             EPSGN16|14             V  G                  32|ECTL2 
             EPSGN12|15             c  n                  31|ECTL14
             EPSGN18|16             c  d                  30|ECTL17
              EPSGN4|17                                   29|ECTL18
                    |   1  1  2  2  2  2  2  2  2  2  2     |      
                    |   8  9  0  1  2  3  4  5  6  7  8     |      
                    '---.--.--.--.--------.--.--.--.--.-----'      
                        |  |  |  |        |  |  |  |  |            
                     ENT7  |  |  |        |  |  |  |  '            
                        ENT6  |  |        |  |  |  '               
                           ENT8  |        |  |  '                  
                              ENT1        |  SPOUT14               
                                          ENT0                     
The Jedec Data is  stored in ===> Th210.jed
The Placements are stored in ===> Th210.plc
The Design Doc is  stored in ===> Th210.rpt
 
%% FITR %% Error Count: 0, Warning Count: 0
%% FITR %% File Processed Successfully. - File: Th210.pds
 
