 
XEPLD, Version XACT-CPLD-V6.0.0                             Xilinx Inc.
                                  Fitter Report
   Design Name: xhd302
Fitting Status: Successful                          Date: 11-26-96,  3:50PM

****************************  Resource Summary  ****************************

Design        Device            Macrocells     Product Terms   Pins            
Name          Used              Used           Used            Used            
xhd302        XC95108-10PQ160   84 /108 ( 77%) 181/540 ( 33%)  103/108 ( 95%) 

PIN RESOURCES:

Signal Type    Required     Mapped  |  Pin Type            Used   Remaining 
------------------------------------|---------------------------------------
Input         :   49          49    |  I/O              :    99        3
Output        :   52          52    |  GCK/IO           :     1        2
Bidirectional :    0           0    |  GTS/IO           :     2        0
GCK           :    1           1    |  GSR/IO           :     1        0
GTS           :    0           0    |
GSR           :    1           1    |
                 ----        ----
        Total    103         103

GLOBAL RESOURCES:

The complement of 'ICECLK' mapped onto global clock net GCK2.
Signal 'ICECLK' mapped onto global clock net GCK3.
Global output enable net(s) unused.
Signal 'EPGO' mapped onto global set/reset net GSR1.

POWER DATA:

There are 84 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
There are a total of 84 macrocells used (MC).

End of Resource Summary
***************Resources Used by Successfully Mapped Logic******************

** LOGIC **
Signal              Total   Signals Loc     Pwr  Slew Pin  Pin       Pin
Name                Pt      Used            Mode Rate #    Type      Use
BRKIACK7            1       2       FB3_5   STD  FAST 54   I/O       O
BUSACTIVE           3       5       FB1_18  STD       43   I/O       I
BUSSTART            1       1       FB5_2   STD       79   I/O       I
DEDICATEDMODE       2       3       FB3_8   STD       58   I/O       I
DIRPBD8             4       7       FB5_8   STD  FAST 90   I/O       O
DIRPBDH             3       6       FB5_9   STD  FAST 92   I/O       O
DIRPBDL             3       6       FB6_1   STD  FAST 91   I/O       O
DLYICEBRK0          2       2       FB3_7   STD       50   I/O       I
DLYICEBRK1          2       2       FB6_18  STD       114  I/O       I
DLYLDS              2       3       FB2_4   STD  FAST 4    I/O       O
DLYUDS              2       4       FB2_6   STD  FAST 2    I/O       O
EPD0                1       4       FB6_14  STD  FAST 122  I/O       O
EPD1                2       6       FB4_1   STD  FAST 123  I/O       O
EPD10               1       5       FB4_6   STD  FAST 139  I/O       O
EPD11               1       5       FB4_8   STD  FAST 140  I/O       O
EPD12               1       5       FB4_9   STD  FAST 142  I/O       O
EPD13               1       5       FB4_11  STD  FAST 143  I/O       O
EPD14               1       5       FB4_12  STD  FAST 144  I/O       O
EPD15               1       5       FB4_16  STD  FAST 145  I/O       O
EPD2                2       6       FB6_15  STD  FAST 124  I/O       O
EPD3                2       6       FB6_17  STD  FAST 126  I/O       O
EPD4                2       6       FB4_7   STD  FAST 128  I/O       O
EPD5                1       4       FB6_16  STD  FAST 129  I/O       O
EPD6                1       4       FB4_4   STD  FAST 133  I/O       O
EPD7                2       6       FB4_2   STD  FAST 134  I/O       O
EPD8                1       5       FB4_3   STD  FAST 135  I/O       O
EPD9                1       5       FB4_5   STD  FAST 138  I/O       O
EPDTACKLATCH        2       2       FB6_13  STD       112  I/O       I
EPIPL0              4       8       FB3_16  STD  FAST 68   I/O       O
EPIPL1              4       8       FB3_15  STD  FAST 64   I/O       O
EPIPL2              6       8       FB3_14  STD  FAST 63   I/O       O
EP_A0               2       3       FB3_10  STD  FAST 69   I/O       O
ET1REG              2       3       FB3_6   STD       56   I/O       I
ET6REG              2       3       FB3_4   STD       57   I/O       I
ET7REG              2       3       FB3_3   STD       49   I/O       I
FLAGNOTRDY          1       7       FB2_14  STD  FAST 15   I/O       O
FORCEDTACK          8       14      FB5_16  STD  FAST 96   I/O       O
GIMRCLK             2       17      FB6_12  STD       117  I/O       I
INDLYLDS            1       1       FB6_9   STD       113  I/O       I
INDLYUDS            1       1       FB6_8   STD       111  I/O       I
IWCT0               2       5       FB5_11  STD       95   I/O       (b)
IWCT1               3       5       FB5_17  STD       102  I/O       I
IWCT2               3       5       FB5_15  STD       101  I/O       I
IWCT3               2       5       FB5_10  STD       84   I/O       I
LATCHIPL            2       4       FB3_2   STD       47   I/O       I
LIPL0               3       2       FB3_17  STD       77   I/O       I
LIPL1               3       2       FB3_13  STD       52   I/O       I
LIPL2               3       2       FB3_9   STD       59   I/O       I
NADVALID            1       1       FB1_1   STD  FAST 25   I/O       O
NDATAVALID          1       2       FB1_6   STD  FAST 24   I/O       O
NDMA                3       5       FB2_9   STD  FAST 8    GTS/I/O   O
NEDMA               2       3       FB2_7   STD  FAST 9    I/O       O
NEDMAFF             2       3       FB2_18  STD       16   I/O       I
NEMDFCC             1       2       FB5_12  STD  FAST 97   I/O       O
NEMSFCC             1       2       FB5_14  STD  FAST 98   I/O       O
NEMVALID            2       5       FB3_18  STD  FAST 74   I/O       O
NENEPFC             2       3       FB3_12  STD  FAST 62   I/O       O
NENPBA              1       1       FB5_13  STD  FAST 87   I/O       O
NENPBD              3       6       FB5_6   STD  FAST 88   I/O       O
NENPBD8             3       6       FB5_18  STD  FAST 89   I/O       O
NENTAS              3       10      FB4_14  STD  FAST 146  I/O       O
NENTCS              1       2       FB4_13  STD  FAST 153  I/O       O
NENTDH              4       8       FB2_2   STD  FAST 154  I/O       O
NENTDL              5       9       FB4_18  STD  FAST 155  I/O       O
NENTLDS             3       10      FB4_15  STD  FAST 148  I/O       O
NENTRW              2       3       FB4_17  STD  FAST 152  I/O       O
NENTUDS             3       11      FB4_10  STD  FAST 147  I/O       O
NERD                2       4       FB1_7   STD  FAST 27   I/O       O
NEWR                2       4       FB1_9   STD  FAST 28   I/O       O
NMEMREQ             3       6       FB1_3   STD  FAST 22   I/O       O
NSELEPFC            1       5       FB3_11  STD  FAST 60   I/O       O
NSTROBE             2       3       FB1_8   STD  FAST 26   I/O       O
NSTROBEDLY          2       3       FB6_11  STD       115  I/O       I
NSTSVALID           1       2       FB1_5   STD  FAST 23   I/O       O
NSTSVALIDFF         2       2       FB1_15  STD       37   I/O       I
NSTSVALIDFFAR       3       5       FB1_17  STD       44   I/O       I
PBCNTBIT0           2       3       FB3_1   STD       45   I/O       I
PBCNTBIT0CLK        2       17      FB6_10  STD       107  I/O       I
WCT0                1       1       FB5_1   STD       76   I/O       I
WCT1                2       2       FB5_7   STD       78   I/O       I
WCT2                2       3       FB5_5   STD       86   I/O       I
WCT3                2       4       FB5_4   STD       72   I/O       I
WCT4                2       5       FB5_3   STD       82   I/O       (b)
WCTSAR              3       6       FB1_16  STD       42   GCK/I/O   GCK

** INPUTS **
Signal                              Loc               Pin  Pin       Pin
Name                                                  #    Type      Use
BMSK8                               FB1_17            44   I/O       I
BRKACK                              FB1_10            36   I/O       I
CPENAS                              FB3_3             49   I/O       I
CPENDS                              FB3_7             50   I/O       I
DISNRDY                             FB2_18            16   I/O       I
EDISCPU                             FB3_2             47   I/O       I
EMUSPACE                            FB2_10            12   I/O       I
EPA1                                FB6_4             116  I/O       I
EPA10                               FB6_7             105  I/O       I
EPA11                               FB6_3             104  I/O       I
EPA2                                FB6_11            115  I/O       I
EPA3                                FB6_18            114  I/O       I
EPA4                                FB6_9             113  I/O       I
EPA5                                FB6_13            112  I/O       I
EPA6                                FB6_8             111  I/O       I
EPA7                                FB6_6             108  I/O       I
EPA8                                FB6_10            107  I/O       I
EPA9                                FB6_5             106  I/O       I
EPAS                                FB5_2             79   I/O       I
EPBG                                FB5_10            84   I/O       I
EPBGACK                             FB5_5             86   I/O       I
EPDTACK                             FB3_1             45   I/O       I
EPFC0                               FB3_4             57   I/O       I
EPFC1                               FB3_8             58   I/O       I
EPFC2                               FB3_9             59   I/O       I
EPGO                                FB2_5             159  GSR/I/O   GSR
EPHALT                              FB5_4             72   I/O       I
EPLDS                               FB5_1             76   I/O       I
EPRST                               FB2_8             6    GTS/I/O   I
EPRW                                FB5_7             78   I/O       I
EPSTOP                              FB1_2             21   I/O       I
EPUDS                               FB3_17            77   I/O       I
EXRDY                               FB1_18            43   I/O       I
IAC                                 FB6_12            117  I/O       I
ICEBRK                              FB1_15            37   I/O       I
ICECLK                              FB1_16            42   GCK/I/O   GCK
ICERDY                              FB2_15            17   I/O       I
ISOEP                               FB2_17            19   I/O       I
NCSACTIVE_I                         FB3_6             56   I/O       I
NEMDFC                              FB2_12            13   I/O       I
NEMSFC                              FB2_13            14   I/O       I
NENIPL                              FB3_13            52   I/O       I
NENNMI                              FB1_4             29   I/O       I
NINSHI                              FB2_3             156  I/O       I
NINSLOW                             FB2_1             158  I/O       I
NMHERE                              FB1_11            30   I/O       I
NRDONLY                             FB1_13            34   I/O       I
QUAL                                FB2_11            11   I/O       I
TIPL0                               FB6_2             103  I/O       I
TIPL1                               FB5_17            102  I/O       I
TIPL2                               FB5_15            101  I/O       I

End of Resources Used by Successfully Mapped Logic

*********************Function Block Resource Summary***********************
Function    # of        FB Inputs   Signals     Total       O/IO      IO    
Block       Macrocells  Used        Used        Pt Used     Req       Avail 
FB1          11          17          17           23         7/0       18   
FB2           7          21          21           16         6/0       18   
FB3          18          34          34           45         8/0       18   
FB4          18          21          21           32        18/0       18   
FB5          18          28          28           44         8/0       18   
FB6          12          25          25           21         5/0       18   
            ----                                -----       -----     ----- 
             84                                  181        52/0      108   
*********************************** FB1 ***********************************
Number of function block inputs used/remaining:               17/19
Number of signals used by logic mapping into function block:  17
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #  Type    Use
NADVALID              1       0     0   4     FB1_1   STD   25  I/O     O
(unused)              0       0     0   5     FB1_2         21  I/O     I
NMEMREQ               3       0     0   2     FB1_3   STD   22  I/O     O
(unused)              0       0     0   5     FB1_4         29  I/O     I
NSTSVALID             1       0     0   4     FB1_5   STD   23  I/O     O
NDATAVALID            1       0     0   4     FB1_6   STD   24  I/O     O
NERD                  2       0     0   3     FB1_7   STD   27  I/O     O
NSTROBE               2       0     0   3     FB1_8   STD   26  I/O     O
NEWR                  2       0     0   3     FB1_9   STD   28  I/O     O
(unused)              0       0     0   5     FB1_10        36  I/O     I
(unused)              0       0     0   5     FB1_11        30  I/O     I
(unused)              0       0     0   5     FB1_12        33  GCK/I/O 
(unused)              0       0     0   5     FB1_13        34  I/O     I
(unused)              0       0     0   5     FB1_14        35  GCK/I/O 
NSTSVALIDFF           2       0     0   3     FB1_15  STD   37  I/O     I
WCTSAR                3       0     0   2     FB1_16  STD   42  GCK/I/O GCK
NSTSVALIDFFAR         3       0     0   2     FB1_17  STD   44  I/O     I
BUSACTIVE             3       0     0   2     FB1_18  STD   43  I/O     I

Signals Used by Logic in Function Block
  1: BMSK8              7: EPFC2             13: NDATAVALID       
  2: EMUSPACE           8: EPLDS             14: NDMA             
  3: EPAS               9: EPRW              15: NSTSVALIDFF      
  4: EPDTACKLATCH      10: EPUDS             16: NSTSVALIDFFAR    
  5: EPFC0             11: IAC               17: QUAL             
  6: EPFC1             12: NCSACTIVE_I      

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
NADVALID             ..X..................................... 1       1
NMEMREQ              .X..XXX...X..X.......................... 6       6
NSTSVALID            ..............X.X....................... 2       2
NDATAVALID           ...X........X........................... 2       2
NERD                 X......XXX.............................. 4       4
NSTROBE              X......X.X.............................. 3       3
NEWR                 X......XXX.............................. 4       4
NSTSVALIDFF          ...X...........X........................ 2       2
WCTSAR               X.X....XXX.X............................ 6       6
NSTSVALIDFFAR        X.X....XXX.............................. 5       5
BUSACTIVE            X.X....XXX.............................. 5       5
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X - Signal used as input to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB2 ***********************************
Number of function block inputs used/remaining:               21/15
Number of signals used by logic mapping into function block:  21
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #  Type    Use
(unused)              0       0     0   5     FB2_1         158 I/O     I
NENTDH                4       0     0   1     FB2_2   STD   154 I/O     O
(unused)              0       0     0   5     FB2_3         156 I/O     I
DLYLDS                2       0     0   3     FB2_4   STD   4   I/O     O
(unused)              0       0     0   5     FB2_5         159 GSR/I/O GSR
DLYUDS                2       0     0   3     FB2_6   STD   2   I/O     O
NEDMA                 2       0     0   3     FB2_7   STD   9   I/O     O
(unused)              0       0     0   5     FB2_8         6   GTS/I/O I
NDMA                  3       0     0   2     FB2_9   STD   8   GTS/I/O O
(unused)              0       0     0   5     FB2_10        12  I/O     I
(unused)              0       0     0   5     FB2_11        11  I/O     I
(unused)              0       0     0   5     FB2_12        13  I/O     I
(unused)              0       0     0   5     FB2_13        14  I/O     I
FLAGNOTRDY            1       0     0   4     FB2_14  STD   15  I/O     O
(unused)              0       0     0   5     FB2_15        17  I/O     I
(unused)              0       0     0   5     FB2_16        18  I/O     
(unused)              0       0     0   5     FB2_17        19  I/O     I
NEDMAFF               2       0     0   3     FB2_18  STD   16  I/O     I

Signals Used by Logic in Function Block
  1: BMSK8              8: EPUDS             15: NINSHI           
  2: DISNRDY            9: FLAGNOTRDY        16: NMHERE           
  3: EDISCPU           10: IAC               17: WCT0             
  4: EMUSPACE          11: INDLYLDS          18: WCT1             
  5: EPAS              12: INDLYUDS          19: WCT2             
  6: EPBG              13: NDMA              20: WCT3             
  7: EPBGACK           14: NEDMAFF           21: WCT4             

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
NENTDH               X.XX.....X..XXXX........................ 8       8
DLYLDS               X......X..X............................. 3       3
DLYUDS               X......X..XX............................ 4       4
NEDMA                ..X.........XX.......................... 3       3
NDMA                 ..X.XXX.....X........................... 5       5
FLAGNOTRDY           .X......X.......XXXXX................... 7       7
NEDMAFF              .....XX......X.......................... 3       3
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X - Signal used as input to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB3 ***********************************
Number of function block inputs used/remaining:               34/2
Number of signals used by logic mapping into function block:  34
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #  Type    Use
PBCNTBIT0             2       0     0   3     FB3_1   STD   45  I/O     I
LATCHIPL              2       0     0   3     FB3_2   STD   47  I/O     I
ET7REG                2       0     0   3     FB3_3   STD   49  I/O     I
ET6REG                2       0     0   3     FB3_4   STD   57  I/O     I
BRKIACK7              1       0     0   4     FB3_5   STD   54  I/O     O
ET1REG                2       0     0   3     FB3_6   STD   56  I/O     I
DLYICEBRK0            2       0     0   3     FB3_7   STD   50  I/O     I
DEDICATEDMODE         2       0     0   3     FB3_8   STD   58  I/O     I
LIPL2                 3       0     0   2     FB3_9   STD   59  I/O     I
EP_A0                 2       0     0   3     FB3_10  STD   69  I/O     O
NSELEPFC              1       0     0   4     FB3_11  STD   60  I/O     O
NENEPFC               2       0     0   3     FB3_12  STD   62  I/O     O
LIPL1                 3       0   \/1   1     FB3_13  STD   52  I/O     I
EPIPL2                6       1<-   0   0     FB3_14  STD   63  I/O     O
EPIPL1                4       0     0   1     FB3_15  STD   64  I/O     O
EPIPL0                4       0     0   1     FB3_16  STD   68  I/O     O
LIPL0                 3       0     0   2     FB3_17  STD   77  I/O     I
NEMVALID              2       0     0   3     FB3_18  STD   74  I/O     O

Signals Used by Logic in Function Block
  1: BMSK8             13: ET1REG            24: NEMDFC           
  2: BRKACK            14: ET6REG            25: NEMSFC           
  3: DEDICATEDMODE     15: ET7REG            26: NEMVALID         
  4: DLYICEBRK1        16: GIMRCLK           27: NENIPL           
  5: EDISCPU           17: ICEBRK            28: NENNMI           
  6: EPFC0             18: INDLYUDS          29: NSTROBEDLY       
  7: EPFC1             19: LATCHIPL          30: PBCNTBIT0        
  8: EPFC2             20: LIPL0             31: PBCNTBIT0CLK     
  9: EPHALT            21: LIPL1             32: TIPL0            
 10: EPLDS             22: LIPL2             33: TIPL1            
 11: EPRST             23: NDMA              34: TIPL2            
 12: EPUDS            

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
PBCNTBIT0            ........X.X...................X......... 3       3
LATCHIPL             ........X.X...............XX............ 4       4
ET7REG               ........X.X....X........................ 3       3
ET6REG               ........X.X....X........................ 3       3
BRKIACK7             .X...........................X.......... 2       2
ET1REG               ........X.X....X........................ 3       3
DLYICEBRK0           ................X........X.............. 2       2
DEDICATEDMODE        ........X.X....X........................ 3       3
LIPL2                ..................X..............X...... 2       2
EP_A0                X..........X.....X...................... 3       3
NSELEPFC             .....XXX........X.....X................. 5       5
NENEPFC              ......................XXX............... 3       3
LIPL1                ..................X.............X....... 2       2
EPIPL2               ...XX.........X.X....X....XX.....X...... 8       8
EPIPL1               ..X.X........X..X...X.....XX....X....... 8       8
EPIPL0               ..X.X.......X...X..X......XX...X........ 8       8
LIPL0                ..................X............X........ 2       2
NEMVALID             X........X.X..........X.....X........... 5       5
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X - Signal used as input to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB4 ***********************************
Number of function block inputs used/remaining:               21/15
Number of signals used by logic mapping into function block:  21
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #  Type    Use
EPD1                  2       0     0   3     FB4_1   STD   123 I/O     O
EPD7                  2       0     0   3     FB4_2   STD   134 I/O     O
EPD8                  1       0     0   4     FB4_3   STD   135 I/O     O
EPD6                  1       0     0   4     FB4_4   STD   133 I/O     O
EPD9                  1       0     0   4     FB4_5   STD   138 I/O     O
EPD10                 1       0     0   4     FB4_6   STD   139 I/O     O
EPD4                  2       0     0   3     FB4_7   STD   128 I/O     O
EPD11                 1       0     0   4     FB4_8   STD   140 I/O     O
EPD12                 1       0     0   4     FB4_9   STD   142 I/O     O
NENTUDS               3       0     0   2     FB4_10  STD   147 I/O     O
EPD13                 1       0     0   4     FB4_11  STD   143 I/O     O
EPD14                 1       0     0   4     FB4_12  STD   144 I/O     O
NENTCS                1       0     0   4     FB4_13  STD   153 I/O     O
NENTAS                3       0     0   2     FB4_14  STD   146 I/O     O
NENTLDS               3       0     0   2     FB4_15  STD   148 I/O     O
EPD15                 1       0     0   4     FB4_16  STD   145 I/O     O
NENTRW                2       0     0   3     FB4_17  STD   152 I/O     O
NENTDL                5       0     0   0     FB4_18  STD   155 I/O     O

Signals Used by Logic in Function Block
  1: BMSK8              8: EPFC1             15: IAC              
  2: BRKACK             9: EPFC2             16: NDMA             
  3: CPENAS            10: EPLDS             17: NEDMAFF          
  4: CPENDS            11: EPRW              18: NINSHI           
  5: EDISCPU           12: EPSTOP            19: NINSLOW          
  6: EMUSPACE          13: EPUDS             20: NMHERE           
  7: EPFC0             14: EXRDY             21: NRDONLY          

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
EPD1                 X........XXXX..X........................ 6       6
EPD7                 X........XXXX..X........................ 6       6
EPD8                 X.........XXX..X........................ 5       5
EPD6                 .........XXX...X........................ 4       4
EPD9                 X.........XXX..X........................ 5       5
EPD10                X.........XXX..X........................ 5       5
EPD4                 X........XXXX..X........................ 6       6
EPD11                X.........XXX..X........................ 5       5
EPD12                X.........XXX..X........................ 5       5
NENTUDS              XX.X.XXXX....XXX...X.................... 11      11
EPD13                X.........XXX..X........................ 5       5
EPD14                X.........XXX..X........................ 5       5
NENTCS               .....X.........X........................ 2       2
NENTAS               .XX..XXXX....XXX...X.................... 10      10
NENTLDS              .X.X.XXXX....XXX...X.................... 10      10
EPD15                X.........XXX..X........................ 5       5
NENTRW               .....X.........X....X................... 3       3
NENTDL               X...XX........XXXXXX.................... 9       9
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X - Signal used as input to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB5 ***********************************
Number of function block inputs used/remaining:               28/8
Number of signals used by logic mapping into function block:  28
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #  Type    Use
WCT0                  1       0     0   4     FB5_1   STD   76  I/O     I
BUSSTART              1       0     0   4     FB5_2   STD   79  I/O     I
WCT4                  2       0     0   3     FB5_3   STD   82  I/O     (b)
WCT3                  2       0     0   3     FB5_4   STD   72  I/O     I
WCT2                  2       0     0   3     FB5_5   STD   86  I/O     I
NENPBD                3       0     0   2     FB5_6   STD   88  I/O     O
WCT1                  2       0     0   3     FB5_7   STD   78  I/O     I
DIRPBD8               4       0     0   1     FB5_8   STD   90  I/O     O
DIRPBDH               3       0     0   2     FB5_9   STD   92  I/O     O
IWCT3                 2       0     0   3     FB5_10  STD   84  I/O     I
IWCT0                 2       0     0   3     FB5_11  STD   95  I/O     (b)
NEMDFCC               1       0     0   4     FB5_12  STD   97  I/O     O
NENPBA                1       0     0   4     FB5_13  STD   87  I/O     O
NEMSFCC               1       0     0   4     FB5_14  STD   98  I/O     O
IWCT2                 3       0   \/1   1     FB5_15  STD   101 I/O     I
FORCEDTACK            8       3<-   0   0     FB5_16  STD   96  I/O     O
IWCT1                 3       0   /\2   0     FB5_17  STD   102 I/O     I
NENPBD8               3       0     0   2     FB5_18  STD   89  I/O     O

Signals Used by Logic in Function Block
  1: BMSK8             11: ISOEP             20: NINSHI           
  2: BUSACTIVE         12: IWCT0             21: NINSLOW          
  3: EMUSPACE          13: IWCT1             22: NMHERE           
  4: EPAS              14: IWCT2             23: WCT0             
  5: EPRW              15: IWCT3             24: WCT1             
  6: EPSTOP            16: NCSACTIVE_I       25: WCT2             
  7: EXRDY             17: NDMA              26: WCT3             
  8: FORCEDTACK        18: NEMDFC            27: WCT4             
  9: IAC               19: NEMSFC            28: WCTSAR           
 10: ICERDY           

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
WCT0                 ...........................X............ 1       1
BUSSTART             .X...................................... 1       1
WCT4                 ......................XXXX.X............ 5       5
WCT3                 ......................XXX..X............ 4       4
WCT2                 ......................XX...X............ 3       3
NENPBD               X..XXX....X.....X....................... 6       6
WCT1                 ......................X....X............ 2       2
DIRPBD8              ..X.X...X.......X..XXX.................. 7       7
DIRPBDH              ..X.X...X.......X...XX.................. 6       6
IWCT3                .X.........XXXX......................... 5       5
IWCT0                .X.........XXXX......................... 5       5
NEMDFCC              ................XX...................... 2       2
NENPBA               ..........X............................. 1       1
NEMSFCC              ................X.X..................... 2       2
IWCT2                .X.........XXXX......................... 5       5
FORCEDTACK           .X....XXXX...XXX.....XXXXXX............. 14      14
IWCT1                .X.........XXXX......................... 5       5
NENPBD8              X..XXX....X.....X....................... 6       6
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X - Signal used as input to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
*********************************** FB6 ***********************************
Number of function block inputs used/remaining:               25/11
Number of signals used by logic mapping into function block:  25
Signal              Total   Imp   Exp Unused  Loc     Pwr   Pin Pin     Pin
Name                Pt      Pt    Pt  Pt              Mode   #  Type    Use
DIRPBDL               3       0     0   2     FB6_1   STD   91  I/O     O
(unused)              0       0     0   5     FB6_2         103 I/O     I
(unused)              0       0     0   5     FB6_3         104 I/O     I
(unused)              0       0     0   5     FB6_4         116 I/O     I
(unused)              0       0     0   5     FB6_5         106 I/O     I
(unused)              0       0     0   5     FB6_6         108 I/O     I
(unused)              0       0     0   5     FB6_7         105 I/O     I
INDLYUDS              1       0     0   4     FB6_8   STD   111 I/O     I
INDLYLDS              1       0     0   4     FB6_9   STD   113 I/O     I
PBCNTBIT0CLK          2       0     0   3     FB6_10  STD   107 I/O     I
NSTROBEDLY            2       0     0   3     FB6_11  STD   115 I/O     I
GIMRCLK               2       0     0   3     FB6_12  STD   117 I/O     I
EPDTACKLATCH          2       0     0   3     FB6_13  STD   112 I/O     I
EPD0                  1       0     0   4     FB6_14  STD   122 I/O     O
EPD2                  2       0     0   3     FB6_15  STD   124 I/O     O
EPD5                  1       0     0   4     FB6_16  STD   129 I/O     O
EPD3                  2       0     0   3     FB6_17  STD   126 I/O     O
DLYICEBRK1            2       0     0   3     FB6_18  STD   114 I/O     I

Signals Used by Logic in Function Block
  1: BMSK8             10: EPA4              18: EPRW             
  2: BUSSTART          11: EPA5              19: EPSTOP           
  3: DLYICEBRK0        12: EPA6              20: EPUDS            
  4: EMUSPACE          13: EPA7              21: IAC              
  5: EPA1              14: EPA8              22: NDMA             
  6: EPA10             15: EPA9              23: NEMVALID         
  7: EPA11             16: EPDTACK           24: NINSHI           
  8: EPA2              17: EPLDS             25: NMHERE           
  9: EPA3             

Signal                        1         2         3         4 Signals FB
Name                0----+----0----+----0----+----0----+----0 Used    Inputs
DIRPBDL              ...X.............X..XX.XX............... 6       6
INDLYUDS             ...................X.................... 1       1
INDLYLDS             ................X....................... 1       1
PBCNTBIT0CLK         X..XXXXXXXXXXXX.XX.XX................... 17      17
NSTROBEDLY           X...............X..X.................... 3       3
GIMRCLK              X..XXXXXXXXXXXX.XX.XX................... 17      17
EPDTACKLATCH         .X.............X........................ 2       2
EPD0                 ................XXX..X.................. 4       4
EPD2                 X...............XXXX.X.................. 6       6
EPD5                 ................XXX..X.................. 4       4
EPD3                 X...............XXXX.X.................. 6       6
DLYICEBRK1           ..X...................X................. 2       2
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input            GCK/FCLK - Global clock
               O  - Output           GTS/FOE  - Global 3state/output-enable
              (b) - Buried macrocell
X - Signal used as input to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
;;-----------------------------------------------------------------;;
; Implemented Equations.

 BRKIACK7  =  BRKACK * PBCNTBIT0    

/DIRPBD8  =  EPRW */IAC */NMHERE
       + /EMUSPACE * EPRW */IAC * NDMA
       +  EPRW */IAC */NINSLOW * NDMA
       +  EPRW */IAC */NINSHI * NDMA    

/DIRPBDH  =  EPRW */IAC */NMHERE
       + /EMUSPACE * EPRW */IAC * NDMA
       +  EPRW */IAC */NINSLOW * NDMA    

/DIRPBDL  =  EPRW */IAC */NMHERE
       + /EMUSPACE * EPRW */IAC * NDMA
       +  EPRW */IAC */NINSHI * NDMA    

/DLYLDS  =  EPUDS */INDLYLDS
       + /BMSK8 */INDLYLDS    

/DLYUDS  = /BMSK8 */INDLYUDS
       +  BMSK8 */EPUDS */INDLYLDS    

/EPD0  = Vcc    
   EPD0.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD1  =  BMSK8 */EPUDS    
   EPD1.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD10  = Vcc    
   EPD10.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD11  = Vcc    
   EPD11.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD12  = Vcc    
   EPD12.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD13  = Gnd    
   EPD13.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD14  = Gnd    
   EPD14.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD15  = Vcc    
   EPD15.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD2  =  BMSK8 */EPUDS    
   EPD2.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD3  =  BMSK8 */EPUDS    
   EPD3.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD4  =  BMSK8 */EPUDS    
   EPD4.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD5  = Gnd    
   EPD5.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD6  = Gnd    
   EPD6.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD7  =  BMSK8 */EPUDS    
   EPD7.TRST = /EPLDS * EPRW * EPSTOP * NDMA

/EPD8  = Vcc    
   EPD8.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPD9  = Vcc    
   EPD9.TRST = /BMSK8 * EPRW * EPSTOP */EPUDS * NDMA

/EPIPL0  =  EDISCPU */TIPL0
       + /EDISCPU * ET1REG */LIPL0
       + /EDISCPU * ICEBRK */DEDICATEDMODE */ET1REG
       + /NENIPL */NENNMI */TIPL0 */ET1REG    

/EPIPL1  =  EDISCPU */TIPL1
       + /EDISCPU * ET6REG */LIPL1
       + /EDISCPU * ICEBRK */DEDICATEDMODE */ET6REG
       + /NENIPL */NENNMI */TIPL1 */ET6REG    

/EPIPL2  =  EDISCPU */TIPL2
       + /EDISCPU * ICEBRK */ET7REG
       + /EDISCPU * ICEBRK */LIPL2
       + /NENIPL */NENNMI */TIPL2 */ET7REG
       + /EDISCPU */NENIPL */NENNMI * ET7REG */LIPL2    
;Imported pterms
       + /EDISCPU * ICEBRK */DLYICEBRK1

/EP_A0  =  BMSK8 */EPUDS
       + /BMSK8 */INDLYUDS    

 FLAGNOTRDY.T  = /DISNRDY */FLAGNOTRDY * WCT0 * WCT1 * WCT2 * WCT3 * WCT4    
   FLAGNOTRDY.CLKF =  ICECLK
   FLAGNOTRDY.RSTF =  EPGO	;GSR
   FLAGNOTRDY.PRLD =  GND


 FORCEDTACK.T  =  ICERDY */FORCEDTACK * IWCT2 * IWCT3
       +  ICERDY * NCSACTIVE_I */FORCEDTACK * IWCT2
       +  ICERDY * NCSACTIVE_I */FORCEDTACK * IWCT3
       + /EXRDY */IAC */NMHERE */FORCEDTACK * IWCT2 * IWCT3    
;Imported pterms
       + /EXRDY */IAC * NCSACTIVE_I */NMHERE */FORCEDTACK * IWCT2
;Imported pterms
       + /EXRDY */IAC * NCSACTIVE_I */NMHERE */FORCEDTACK * IWCT3
       + /FORCEDTACK * WCT0 * WCT1 * WCT2 * WCT3 * WCT4
   FORCEDTACK.CLKF =  ICECLK
   FORCEDTACK.RSTF = /BUSACTIVE
   FORCEDTACK.PRLD =  GND


/NADVALID  = /EPAS    

/NDATAVALID :=  NDATAVALID */EPDTACKLATCH    
   NDATAVALID.CLKF =  ICECLK
   NDATAVALID.PRLD =  GND


 NDMA := /EPAS * NDMA    
   NDMA.CLKF =  ICECLK
   NDMA.RSTF =  EDISCPU
   NDMA.SETF = /EDISCPU * EPBGACK * EPBG
   NDMA.PRLD =  VCC


/NEDMA  =  EDISCPU
       + /NDMA */NEDMAFF    

/NEMDFCC  = /NEMDFC * NDMA    

/NEMSFCC  = /NEMSFC * NDMA    

/NEMVALID  = /EPLDS * NDMA */NSTROBEDLY
       + /BMSK8 */EPUDS * NDMA */NSTROBEDLY    

/NENEPFC  = /NDMA
       +  NEMDFC * NEMSFC    

/NENPBA  = /ISOEP    

/NENPBD  = /BMSK8 */ISOEP */NDMA
       + /BMSK8 */EPRW */EPSTOP */ISOEP
       + /BMSK8 */EPAS */EPSTOP */ISOEP    

/NENPBD8  =  BMSK8 */ISOEP */NDMA
       +  BMSK8 */EPRW */EPSTOP */ISOEP
       +  BMSK8 */EPAS */EPSTOP */ISOEP    

 NENTAS  = /CPENAS */EMUSPACE * NDMA
       + /CPENAS */EXRDY */IAC */NMHERE * NDMA
       +  BRKACK * EPFC0 * EPFC1 * EPFC2 * NDMA    

 NENTCS  = /EMUSPACE * NDMA    

 NENTDH  = /EDISCPU */EMUSPACE * NDMA
       + /BMSK8 */EDISCPU */NINSHI * NDMA
       + /EDISCPU */IAC */NMHERE * NDMA
       + /EDISCPU */IAC */NMHERE * NEDMAFF    

 NENTDL  = /EDISCPU */EMUSPACE * NDMA
       + /EDISCPU */NINSLOW * NDMA
       +  BMSK8 */EDISCPU */NINSHI * NDMA
       + /EDISCPU */IAC */NMHERE * NDMA
       + /EDISCPU */IAC */NMHERE * NEDMAFF    

 NENTLDS  = /CPENDS */EMUSPACE * NDMA
       + /CPENDS */EXRDY */IAC */NMHERE * NDMA
       +  BRKACK * EPFC0 * EPFC1 * EPFC2 * NDMA    

/NENTRW  = /NDMA
       +  EMUSPACE * NRDONLY    

 NENTUDS  = /BMSK8 */CPENDS */EMUSPACE * NDMA
       + /BMSK8 */CPENDS */EXRDY */IAC */NMHERE * NDMA
       + /BMSK8 * BRKACK * EPFC0 * EPFC1 * EPFC2 * NDMA    

/NERD  = /EPLDS * EPRW
       + /BMSK8 * EPRW */EPUDS    

/NEWR  = /EPLDS */EPRW
       + /BMSK8 */EPRW */EPUDS    

 NMEMREQ  =  IAC
       + /EMUSPACE * NDMA
       +  EPFC0 * EPFC1 * EPFC2    

 NSELEPFC  =  EPFC0 * EPFC1 * EPFC2 * ICEBRK * NDMA    

/NSTROBE  = /EPLDS
       + /BMSK8 */EPUDS    

 NSTSVALID  =  QUAL * NSTSVALIDFF    

 BUSACTIVE  = /EPLDS
       + /BMSK8 */EPUDS
       + /EPAS */EPRW    

/BUSSTART := Gnd    
   BUSSTART.CLKF =  ICECLK
   BUSSTART.RSTF = /BUSACTIVE
   BUSSTART.PRLD =  GND


/DEDICATEDMODE := Vcc    
   DEDICATEDMODE.CLKF =  GIMRCLK
   DEDICATEDMODE.RSTF = /EPHALT */EPRST
   DEDICATEDMODE.PRLD =  GND


/DLYICEBRK0 := /ICEBRK    
   DLYICEBRK0.CLKF =  NEMVALID
   DLYICEBRK0.PRLD =  GND


/DLYICEBRK1 := /DLYICEBRK0    
   DLYICEBRK1.CLKF =  NEMVALID
   DLYICEBRK1.PRLD =  GND


/EPDTACKLATCH := /EPDTACK    
   EPDTACKLATCH.CLKF = / ICECLK
   EPDTACKLATCH.SETF = /BUSSTART
   EPDTACKLATCH.PRLD =  VCC


/ET1REG := Vcc    
   ET1REG.CLKF =  GIMRCLK
   ET1REG.RSTF = /EPHALT */EPRST
   ET1REG.PRLD =  GND


/ET6REG := Vcc    
   ET6REG.CLKF =  GIMRCLK
   ET6REG.RSTF = /EPHALT */EPRST
   ET6REG.PRLD =  GND


/ET7REG := Vcc    
   ET7REG.CLKF =  GIMRCLK
   ET7REG.RSTF = /EPHALT */EPRST
   ET7REG.PRLD =  GND


/GIMRCLK  = /BMSK8 * EMUSPACE */EPA10 * EPA11 * EPA1 */EPA2 */EPA3
           * EPA4 */EPA5 */EPA6 */EPA7 */EPA8 */EPA9 */EPRW */EPUDS
           * IAC
       +  BMSK8 * EMUSPACE */EPA10 * EPA11 * EPA1 */EPA2 */EPA3
           * EPA4 */EPA5 */EPA6 */EPA7 */EPA8 */EPA9 */EPLDS */EPRW
           */EPUDS * IAC    

/INDLYLDS := Gnd    
   INDLYLDS.CLKF = / ICECLK
   INDLYLDS.RSTF = /EPLDS
   INDLYLDS.PRLD =  GND


/INDLYUDS := Gnd    
   INDLYUDS.CLKF = / ICECLK
   INDLYUDS.RSTF = /EPUDS
   INDLYUDS.PRLD =  GND


/IWCT0.T  =  IWCT0 * IWCT1 * IWCT2 * IWCT3    
   IWCT0.CLKF =  ICECLK
   IWCT0.RSTF = /BUSACTIVE
   IWCT0.PRLD =  GND


/IWCT1.T  = /IWCT0
       +  IWCT1 * IWCT2 * IWCT3    
   IWCT1.CLKF =  ICECLK
   IWCT1.RSTF = /BUSACTIVE
   IWCT1.PRLD =  GND


 IWCT2.T  =  IWCT0 * IWCT1 */IWCT2
       +  IWCT0 * IWCT1 */IWCT3    
   IWCT2.CLKF =  ICECLK
   IWCT2.RSTF = /BUSACTIVE
   IWCT2.PRLD =  GND


 IWCT3.T  =  IWCT0 * IWCT1 * IWCT2 */IWCT3    
   IWCT3.CLKF =  ICECLK
   IWCT3.RSTF = /BUSACTIVE
   IWCT3.PRLD =  GND


/LATCHIPL  = /EPHALT */EPRST
       + /NENIPL */NENNMI    

/LIPL0 := Vcc    
   LIPL0.CLKF = Gnd
   LIPL0.RSTF = /TIPL0 */LATCHIPL
   LIPL0.SETF =  TIPL0 */LATCHIPL
   LIPL0.PRLD =  GND


/LIPL1 := Vcc    
   LIPL1.CLKF = Gnd
   LIPL1.RSTF = /TIPL1 */LATCHIPL
   LIPL1.SETF =  TIPL1 */LATCHIPL
   LIPL1.PRLD =  GND


/LIPL2 := Vcc    
   LIPL2.CLKF = Gnd
   LIPL2.RSTF = /TIPL2 */LATCHIPL
   LIPL2.SETF =  TIPL2 */LATCHIPL
   LIPL2.PRLD =  GND


 NEDMAFF :=  EPBG * NEDMAFF    
   NEDMAFF.CLKF =  ICECLK
   NEDMAFF.SETF =  EPBGACK * EPBG
   NEDMAFF.PRLD =  VCC


/NSTROBEDLY := /EPLDS
       + /BMSK8 */EPUDS    
   NSTROBEDLY.CLKF =  ICECLK
   NSTROBEDLY.PRLD =  GND


/NSTSVALIDFF :=  EPDTACKLATCH    
   NSTSVALIDFF.CLKF =  ICECLK
   NSTSVALIDFF.RSTF =  NSTSVALIDFFAR
   NSTSVALIDFF.PRLD =  VCC


/NSTSVALIDFFAR  = /EPLDS
       + /BMSK8 */EPUDS
       + /EPAS */EPRW    

/PBCNTBIT0 := Vcc    
   PBCNTBIT0.CLKF =  PBCNTBIT0CLK
   PBCNTBIT0.RSTF = /EPHALT */EPRST
   PBCNTBIT0.PRLD =  GND


/PBCNTBIT0CLK  =  EMUSPACE */EPA10 * EPA11 */EPA1 * EPA2 */EPA3 */EPA4
           * EPA5 */EPA6 */EPA7 */EPA8 */EPA9 */EPLDS */EPRW * EPUDS
           * IAC
       + /BMSK8 * EMUSPACE */EPA10 * EPA11 */EPA1 * EPA2 */EPA3
           */EPA4 * EPA5 */EPA6 */EPA7 */EPA8 */EPA9 */EPLDS */EPRW
           * IAC    

/WCT0.T  = Gnd    
   WCT0.CLKF =  ICECLK
   WCT0.RSTF =  WCTSAR
   WCT0.PRLD =  GND


/WCT1.T  = /WCT0    
   WCT1.CLKF =  ICECLK
   WCT1.RSTF =  WCTSAR
   WCT1.PRLD =  GND


 WCT2.T  =  WCT0 * WCT1    
   WCT2.CLKF =  ICECLK
   WCT2.RSTF =  WCTSAR
   WCT2.PRLD =  GND


 WCT3.T  =  WCT0 * WCT1 * WCT2    
   WCT3.CLKF =  ICECLK
   WCT3.RSTF =  WCTSAR
   WCT3.PRLD =  GND


 WCT4.T  =  WCT0 * WCT1 * WCT2 * WCT3    
   WCT4.CLKF =  ICECLK
   WCT4.RSTF =  WCTSAR
   WCT4.PRLD =  GND


/WCTSAR  = /EPLDS * NCSACTIVE_I
       + /BMSK8 */EPUDS * NCSACTIVE_I
       + /EPAS */EPRW * NCSACTIVE_I    

****************************  Device Pin Out ****************************

Device : XC95108-10PQ160


Pin  Signal                          Pin  Signal                        
No.  Name                            No.  Name                          
  1  VCC                              81  VCC                           
  2  DLYUDS                           82  N.C.                          
  3  N.C.                             83  N.C.                          
  4  DLYLDS                           84  EPBG                          
  5  N.C.                             85  N.C.                          
  6  EPRST                            86  EPBGACK                       
  7  N.C.                             87  NENPBA                        
  8  NDMA                             88  NENPBD                        
  9  NEDMA                            89  NENPBD8                       
 10  VCC                              90  DIRPBD8                       
 11  QUAL                             91  DIRPBDL                       
 12  EMUSPACE                         92  DIRPBDH                       
 13  NEMDFC                           93  N.C.                          
 14  NEMSFC                           94  VCC                           
 15  FLAGNOTRDY                       95  N.C.                          
 16  DISNRDY                          96  FORCEDTACK                    
 17  ICERDY                           97  NEMDFCC                       
 18  N.C.                             98  NEMSFCC                       
 19  ISOEP                            99  GND                           
 20  GND                             100  GND                           
 21  EPSTOP                          101  TIPL2                         
 22  NMEMREQ                         102  TIPL1                         
 23  NSTSVALID                       103  TIPL0                         
 24  NDATAVALID                      104  EPA11                         
 25  NADVALID                        105  EPA10                         
 26  NSTROBE                         106  EPA9                          
 27  NERD                            107  EPA8                          
 28  NEWR                            108  EPA7                          
 29  NENNMI                          109  N.C.                          
 30  NMHERE                          110  GND                           
 31  GND                             111  EPA6                          
 32  N.C.                            112  EPA5                          
 33  N.C.                            113  EPA4                          
 34  NRDONLY                         114  EPA3                          
 35  N.C.                            115  EPA2                          
 36  BRKACK                          116  EPA1                          
 37  ICEBRK                          117  IAC                           
 38  N.C.                            118  N.C.                          
 39  N.C.                            119  N.C.                          
 40  GND                             120  GND                           
 41  VCC                             121  VCC                           
 42  ICECLK                          122  EPD0                          
 43  EXRDY                           123  EPD1                          
 44  BMSK8                           124  EPD2                          
 45  EPDTACK                         125  N.C.                          
 46  VCC                             126  EPD3                          
 47  EDISCPU                         127  GND                           
 48  N.C.                            128  EPD4                          
 49  CPENAS                          129  EPD5                          
 50  CPENDS                          130  N.C.                          
 51  GND                             131  N.C.                          
 52  NENIPL                          132  N.C.                          
 53  N.C.                            133  EPD6                          
 54  BRKIACK7                        134  EPD7                          
 55  N.C.                            135  EPD8                          
 56  NCSACTIVE_I                     136  TDO                           
 57  EPFC0                           137  GND                           
 58  EPFC1                           138  EPD9                          
 59  EPFC2                           139  EPD10                         
 60  NSELEPFC                        140  EPD11                         
 61  VCC                             141  VCC                           
 62  NENEPFC                         142  EPD12                         
 63  EPIPL2                          143  EPD13                         
 64  EPIPL1                          144  EPD14                         
 65  N.C.                            145  EPD15                         
 66  N.C.                            146  NENTAS                        
 67  N.C.                            147  NENTUDS                       
 68  EPIPL0                          148  NENTLDS                       
 69  EP_A0                           149  N.C.                          
 70  GND                             150  N.C.                          
 71  TDI                             151  N.C.                          
 72  EPHALT                          152  NENTRW                        
 73  TMS                             153  NENTCS                        
 74  NEMVALID                        154  NENTDH                        
 75  TCK                             155  NENTDL                        
 76  EPLDS                           156  NINSHI                        
 77  EPUDS                           157  VCC                           
 78  EPRW                            158  NINSLOW                       
 79  EPAS                            159  EPGO                          
 80  GND                             160  GND                           


Legend : N.C. = Pin Not Connected
         VCC  = Dedicated Power Pin
         GND  = Dedicated Ground Pin
         TDI  = Test Data In, JTAG pin
         TDO  = Test Data Out, JTAG pin
         TCK  = Test Clock, JTAG pin
         TMS  = Test Mode Select, JTAG pin
****************************  Compiler Options  ****************************

Following is a list of all global compiler options used by the fitter run.

Device Selection Mode                       : Single
Device(s) Specified                         : 95108-10PQ160
Global Clock Optimization                   : INDESIGN - ON
Global Output Enable Optimization           : INDESIGN - ON
UIM Optimization                            : INDESIGN - ON
Timing Optimization                         : ON
Ignore Tspecs                               : OFF
Create Programmable Ground Pins             : OFF
Guide File Used                             : NONE
Ignore Pin Assignments                      : OFF
Restore Pin Assignments After Optimizations : ON
Collapsing pterm limit                      : 15
Collapsing input limit                      : 34
