Project Information                               c:\hd302\hd302c1\hd302c1.rpt

MAX+plus II Compiler Report File
Version 6.2 06/12/96
Compiled: 11/26/96 09:39:23

Copyright (c) 1996 by Altera Corporation.  All rights reserved.  This text
contains proprietary, confidential information of Altera Corporation, and
may be used, copied, and/or disclosed only pursuant to the terms of a
valid software license agreement with Altera Corporation.  This copyright
notice must be retained as part of this text at all times.



***** Project compilation was successful


The Header controller of MICEpack 68302. rev 2.0


** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

hd302c1   EPM7128EQC160-10 56       38       0      64      24          50 %

User Pins:                 56       38       0  



Project Information                               c:\hd302\hd302c1\hd302c1.rpt

** PIN/LC/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

hd302c1@160                       bmsk8
hd302c1@146                       brkAck
hd302c1@69                        brkIack7
hd302c1                           busStart
hd302c1@52                        cpenas
hd302c1@54                        cpends
hd302c1                           dedicatedMode
hd302c1@106                       dirpbdh
hd302c1@109                       dirpbdl
hd302c1@111                       dirpbd8
hd302c1@51                        disnrdy
hd302c1                           dlyIceBrk0
hd302c1                           dlyIceBrk1
hd302c1@65                        dlyLds
hd302c1@68                        dlyUds
hd302c1@32                        eDisCpu
hd302c1@153                       emuspace
hd302c1@149                       epAs
hd302c1@73                        ep_A0
hd302c1@72                        epA1
hd302c1@105                       epA2
hd302c1@103                       epA3
hd302c1@101                       epA4
hd302c1@62                        epA5
hd302c1@49                        epA6
hd302c1@107                       epA7
hd302c1@63                        epA8
hd302c1@43                        epA9
hd302c1@23                        epA10
hd302c1@24                        epA11
hd302c1@25                        epBg
hd302c1@10                        epBgack
hd302c1@14                        epDtack
hd302c1                           epDtackLatch
hd302c1@16                        epD0
hd302c1@20                        epD8
hd302c1@11                        epD9
hd302c1@33                        epD10
hd302c1@21                        epD15
hd302c1@19                        epfc0
hd302c1@18                        epfc1
hd302c1@13                        epfc2
hd302c1@132                       epGo
hd302c1@152                       epHalt
hd302c1@64                        epIpl0
hd302c1@67                        epIpl1
hd302c1@71                        epIpl2
hd302c1@159                       epLds
hd302c1@150                       epRst
hd302c1@147                       epRw
hd302c1@27                        epStop
hd302c1@141                       epUds
hd302c1                           et1reg
hd302c1                           et6reg
hd302c1                           et7reg
hd302c1@144                       exRdy
hd302c1@110                       Fdtack
hd302c1@108                       flagNotRdy
hd302c1@158                       iac
hd302c1@145                       iceBrk
hd302c1@139                       iceClk
hd302c1@28                        iceRdy
hd302c1                           indlyLds
hd302c1                           indlyUds
hd302c1@53                        isoep
hd302c1                           iwct0
hd302c1                           iwct1
hd302c1                           iwct2
hd302c1                           iwct3
hd302c1                           lIpl0
hd302c1                           lIpl1
hd302c1                           lIpl2
hd302c1@129                       nadvalid
hd302c1@41                        nCsActive_I
hd302c1@31                        ndatavalid
hd302c1@90                        nDma
hd302c1@30                        nEdma
hd302c1                           nEdmaFF
hd302c1@15                        nemdfc
hd302c1@97                        nemdfcc
hd302c1@78                        nemsfc
hd302c1@80                        nemsfcc
hd302c1@98                        nemvalid
hd302c1@96                        nenepfc
hd302c1@131                       nenHiByteO
hd302c1@140                       nenIpl
hd302c1@123                       nenLowByteO
hd302c1@29                        nenNMI
hd302c1@137                       nenpba
hd302c1@136                       nenpbd
hd302c1@135                       nenpbd8
hd302c1@89                        nentas
hd302c1@100                       nenTcs
hd302c1@134                       nentdh
hd302c1@102                       nentdl
hd302c1@92                        nentlds
hd302c1@91                        nentrw
hd302c1@88                        nentuds
hd302c1@122                       nerd
hd302c1@121                       newr
hd302c1@50                        ninshi
hd302c1@130                       ninslow
hd302c1@93                        nmemreq
hd302c1@151                       nmhere
hd302c1@56                        nRdOnly
hd302c1@94                        nselepfc
hd302c1@128                       nstrobe
hd302c1                           nstrobeDly
hd302c1@70                        nstsvalid
hd302c1                           nstsValidFF
hd302c1                           pbcntBit0
hd302c1@48                        qual
hd302c1@59                        tIpl0
hd302c1@58                        tIpl1
hd302c1@57                        tIpl2
hd302c1                           wct0
hd302c1                           wct1
hd302c1                           wct2
hd302c1                           wct3
hd302c1                           wct4


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

***** Logic for device 'hd302c1' compiled without errors.




Device: EPM7128EQC160-10
Turbo: ON
Security: ON


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** ERROR SUMMARY **

Info: Chip 'hd302c1' in device 'EPM7128EQC160-10' has less than 20% of pins available for future logic changes -- if your project is likely to change, Altera recommends using a larger device
                                                                                           n      
                                                                           n               e      
                                                                           e               n      
                               e                                           n   n           L      
                               m                                   n       H n a n         o      
                               u e n         b i         n i   n n e n     i i d s         w      
                 b e           s p m e       r c e     e e c   e e n e     B n v t         B      
                 m p   N N N N p H h p e   e k e x     p n e   n n p n   e y s a r N N N N y n n  
                 s L i . . . . a a e R p G p A B R V G U I C G p p b t V p t l l o . . . . t e e  
                 k d a C C C C c l r s A N R c r d C N d p l N b b d d C G e o i b C C C C e r w  
                 8 s c . . . . e t e t s D w k k y C D s l k D a d 8 h C o O w d e . . . . O d r  
               ----------------------------------------------------------------------------------_ 
              / 160 158 156 154 152 150 148 146 144 142 140 138 136 134 132 130 128 126 124 122   |_ 
             /    159 157 155 153 151 149 147 145 143 141 139 137 135 133 131 129 127 125 123 121    | 
       N.C. |  1                                                                                 120 | N.C. 
       N.C. |  2                                                                                 119 | N.C. 
       N.C. |  3                                                                                 118 | N.C. 
       N.C. |  4                                                                                 117 | N.C. 
       N.C. |  5                                                                                 116 | N.C. 
       N.C. |  6                                                                                 115 | N.C. 
       N.C. |  7                                                                                 114 | N.C. 
        VCC |  8                                                                                 113 | GND 
   RESERVED |  9                                                                                 112 | RESERVED 
    epBgack | 10                                                                                 111 | dirpbd8 
       epD9 | 11                                                                                 110 | Fdtack 
   RESERVED | 12                                                                                 109 | dirpbdl 
      epfc2 | 13                                                                                 108 | flagNotRdy 
    epDtack | 14                                                                                 107 | epA7 
     nemdfc | 15                                                                                 106 | dirpbdh 
       epD0 | 16                                                                                 105 | epA2 
        GND | 17                                                                                 104 | VCC 
      epfc1 | 18                                                                                 103 | epA3 
      epfc0 | 19                                                                                 102 | nentdl 
       epD8 | 20                                                                                 101 | epA4 
      epD15 | 21                                EPM7128EQC160-10                                 100 | nenTcs 
   RESERVED | 22                                                                                  99 | RESERVED 
      epA10 | 23                                                                                  98 | nemvalid 
      epA11 | 24                                                                                  97 | nemdfcc 
       epBg | 25                                                                                  96 | nenepfc 
        VCC | 26                                                                                  95 | GND 
     epStop | 27                                                                                  94 | nselepfc 
     iceRdy | 28                                                                                  93 | nmemreq 
     nenNMI | 29                                                                                  92 | nentlds 
      nEdma | 30                                                                                  91 | nentrw 
 ndatavalid | 31                                                                                  90 | nDma 
    eDisCpu | 32                                                                                  89 | nentas 
      epD10 | 33                                                                                  88 | nentuds 
       N.C. | 34                                                                                  87 | N.C. 
       N.C. | 35                                                                                  86 | N.C. 
       N.C. | 36                                                                                  85 | N.C. 
       N.C. | 37                                                                                  84 | N.C. 
       N.C. | 38                                                                                  83 | N.C. 
       N.C. | 39                                                                                  82 | N.C. 
       N.C. | 40                                                                                  81 | N.C. 
            |      42  44  46  48  50  52  54  56  58  60  62  64  66  68  70  72  74  76  78  80  _| 
             \   41  43  45  47  49  51  53  55  57  59  61  63  65  67  69  71  73  75  77  79   | 
              \----------------------------------------------------------------------------------- 
                 n G e N N N N q e n d c i c V n t t t G V e e e d G e d b n e e e N N N N n V n  
                 C N p . . . . u p i i p s p C R I I I N C p p p l N p l r s p p p . . . . e C e  
                 s D A C C C C a A n s e o e C d p p p D C A A I y D I y k t I A _ C C C C m C m  
                 A   9 . . . . l 6 s n n e n   O l l l     5 8 p L   p U I s p 1 A . . . . s   s  
                 c                 h r a p d   n 2 1 0         l d   l d a v l   0         f   f  
                 t                 i d s   s   l               0 s   1 s c a 2             c   c  
                 i                   y         y                         k l                   c  
                 v                                                       7 i                      
                 e                                                         d                      
                 _                                                                                
                 I                                                                                


N.C. = Not Connected.
VCC = Dedicated power pin, which MUST be connected to VCC.
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.



Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** RESOURCE USAGE **

                                                Shareable     External
Logic Array Block     Logic Cells   I/O Pins    Expanders   Interconnect

A:     LC1 - LC16     0/16(  0%)  12/12(100%)   0/16(  0%)   0/36(  0%) 
B:    LC17 - LC32     1/16(  6%)  10/12( 83%)   2/16( 12%)   6/36( 16%) 
C:    LC33 - LC48     2/16( 12%)  11/12( 91%)   0/16(  0%)   5/36( 13%) 
D:    LC49 - LC64     0/16(  0%)  12/12(100%)   0/16(  0%)   0/36(  0%) 
E:    LC65 - LC80    14/16( 87%)  12/12(100%)   4/16( 25%)  29/36( 80%) 
F:    LC81 - LC96    16/16(100%)  11/12( 91%)   4/16( 25%)  26/36( 72%) 
G:   LC97 - LC112    16/16(100%)  11/12( 91%)  13/16( 81%)  29/36( 80%) 
H:  LC113 - LC128    15/16( 93%)  12/12(100%)   4/16( 25%)  32/36( 88%) 


Total dedicated input pins used:                 3/4    ( 75%)
Total I/O pins used:                            91/96   ( 94%)
Total logic cells used:                         64/128  ( 50%)
Total shareable expanders used:                 24/128  ( 18%)
Total Turbo logic cells used:                   64/128  ( 50%)
Total shareable expanders not available (n/a):   3/128  (  2%)

Total input pins required:                      56
Total input registers required:                  0
Total output pins required:                     38
Total bidirectional pins required:               0
Total logic cells required:                     64
Total flipflops required:                       27
Total shareable expanders in database:          20

Synthesized logic cells:                         0/ 128 (  0%)



Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** INPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
 160    (1)  (A)      INPUT              0      0   0    0    0   14   19  bmsk8
 146   (13)  (A)      INPUT              0      0   0    0    0    4    0  brkAck
  52   (57)  (D)      INPUT              0      0   0    0    0    1    0  cpenas
  54   (54)  (D)      INPUT              0      0   0    0    0    2    0  cpends
  51   (59)  (D)      INPUT              0      0   0    0    0    1    0  disnrdy
  32   (36)  (C)      INPUT              0      0   0    0    0    7    0  eDisCpu
 153    (5)  (A)      INPUT              0      0   0    0    0   11    5  emuspace
 149   (11)  (A)      INPUT              0      0   0    0    0    5   11  epAs
  72   (77)  (E)      INPUT              0      0   0    0    0    0    5  epA1
 105  (102)  (G)      INPUT              0      0   0    0    0    0    5  epA2
 103  (101)  (G)      INPUT              0      0   0    0    0    0    5  epA3
 101   (99)  (G)      INPUT              0      0   0    0    0    0    5  epA4
  62   (65)  (E)      INPUT              0      0   0    0    0    0    5  epA5
  49   (61)  (D)      INPUT              0      0   0    0    0    0    5  epA6
 107  (105)  (G)      INPUT              0      0   0    0    0    0    5  epA7
  63   (67)  (E)      INPUT              0      0   0    0    0    0    5  epA8
  43   (64)  (D)      INPUT              0      0   0    0    0    0    5  epA9
  23   (46)  (C)      INPUT              0      0   0    0    0    0    5  epA10
  24   (45)  (C)      INPUT              0      0   0    0    0    0    5  epA11
  25   (44)  (C)      INPUT              0      0   0    0    0    1    1  epBg
  10   (30)  (B)      INPUT              0      0   0    0    0    1    1  epBgack
  14   (25)  (B)      INPUT              0      0   0    0    0    0    1  epDtack
  16   (22)  (B)      INPUT              0      0   0    0    0    0    1  epD0
  20   (19)  (B)      INPUT              0      0   0    0    0    0    1  epD8
  11   (29)  (B)      INPUT              0      0   0    0    0    0    1  epD9
  33   (35)  (C)      INPUT              0      0   0    0    0    0    1  epD10
  21   (17)  (B)      INPUT              0      0   0    0    0    0    4  epD15
  19   (20)  (B)      INPUT              0      0   0    0    0    5    0  epfc0
  18   (21)  (B)      INPUT              0      0   0    0    0    5    0  epfc1
  13   (27)  (B)      INPUT              0      0   0    0    0    5    0  epfc2
 132  (123)  (H)      INPUT              0      0   0    0    0    1    0  epGo
 152    (6)  (A)      INPUT              0      0   0    0    0    0    8  epHalt
 159    (3)  (A)      INPUT              0      0   0    0    0    6   20  epLds
 150    (9)  (A)      INPUT              0      0   0    0    0    0    8  epRst
 147   (12)  (A)      INPUT              0      0   0    0    0   10   16  epRw
  27   (43)  (C)      INPUT              0      0   0    0    0    4    0  epStop
 141      -   -       INPUT              0      0   0    0    0    9   19  epUds
 144   (16)  (A)      INPUT              0      0   0    0    0    4    0  exRdy
 158    (4)  (A)      INPUT              0      0   0    0    0   10    5  iac
 145   (14)  (A)      INPUT              0      0   0    0    0    4    1  iceBrk
 139      -   -       INPUT              0      0   0    0    0    0    3  iceClk
  28   (41)  (C)      INPUT              0      0   0    0    0    1    0  iceRdy
  53   (56)  (D)      INPUT              0      0   0    0    0    3    0  isoep
  41   (33)  (C)      INPUT              0      0   0    0    0    1    5  nCsActive_I
  15   (24)  (B)      INPUT              0      0   0    0    0    2    0  nemdfc
  78   (80)  (E)      INPUT              0      0   0    0    0    2    0  nemsfc
 140      -   -       INPUT              0      0   0    0    0    3    3  nenIpl
  29   (40)  (C)      INPUT              0      0   0    0    0    3    3  nenNMI
  50   (60)  (D)      INPUT              0      0   0    0    0    4    0  ninshi
 130  (120)  (H)      INPUT              0      0   0    0    0    3    0  ninslow
 151    (8)  (A)      INPUT              0      0   0    0    0    9    0  nmhere
  56   (53)  (D)      INPUT              0      0   0    0    0    1    0  nRdOnly
  48   (62)  (D)      INPUT              0      0   0    0    0    1    0  qual
  59   (49)  (D)      INPUT              0      0   0    0    0    1    1  tIpl0
  58   (51)  (D)      INPUT              0      0   0    0    0    1    1  tIpl1
  57   (52)  (D)      INPUT              0      0   0    0    0    1    1  tIpl2


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** OUTPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  69     73    E     OUTPUT     t        0      0   0    1    1    0    0  brkIack7
 106    104    G     OUTPUT     t        0      0   0    5    1    0    0  dirpbdh
 109    108    G     OUTPUT     t        0      0   0    5    1    0    0  dirpbdl
 111    110    G     OUTPUT     t        0      0   0    6    1    0    0  dirpbd8
  65     69    E     OUTPUT     t        0      0   0    2    1    0    0  dlyLds
  68     72    E     OUTPUT     t        0      0   0    2    2    0    0  dlyUds
  73     78    E     OUTPUT     t        0      0   0    2    1    0    0  ep_A0
  64     68    E     OUTPUT     t        1      0   1    5    3    0    0  epIpl0
  67     70    E     OUTPUT     t        1      0   1    5    3    0    0  epIpl1
  71     76    E     OUTPUT     t        1      0   0    5    3    0    0  epIpl2
 110    109    G         FF  +  t        9      2   0   10    8    1    0  Fdtack
 108    107    G         FF  +  t        0      0   0    2    6    1    0  flagNotRdy
 129    118    H     OUTPUT     t        0      0   0    1    0    0    0  nadvalid
  31     37    C         FF  +  t        0      0   0    0    2    1    0  ndatavalid
  90     85    F         FF  +  t        0      0   0    4    1   22    2  nDma
  30     38    C     OUTPUT     t        0      0   0    1    2    0    0  nEdma
  97     93    F     OUTPUT     t        0      0   0    1    1    0    0  nemdfcc
  80     81    F     OUTPUT     t        0      0   0    1    1    0    0  nemsfcc
  98     94    F     OUTPUT     t        0      0   0    3    2    0    0  nemvalid
  96     92    F     OUTPUT     t        0      0   0    2    1    0    0  nenepfc
 131    121    H     OUTPUT     t        0      0   0    4    1    0    0  nenHiByteO
 123    116    H     OUTPUT     t        0      0   0    3    1    0    0  nenLowByteO
 137    128    H     OUTPUT     t        0      0   0    1    0    0    0  nenpba
 136    126    H     OUTPUT     t        0      0   0    5    1    0    0  nenpbd
 135    125    H     OUTPUT     t        0      0   0    5    1    0    0  nenpbd8
  89     84    F     OUTPUT     t        0      0   0    9    1    0    0  nentas
 100     97    G     OUTPUT     t        0      0   0    1    1    0    0  nenTcs
 134    124    H     OUTPUT     t        0      0   0    6    2    0    0  nentdh
 102    100    G     OUTPUT     t        1      0   1    7    2    0    0  nentdl
  92     88    F     OUTPUT     t        0      0   0    9    1    0    0  nentlds
  91     86    F     OUTPUT     t        0      0   0    2    1    0    0  nentrw
  88     83    F     OUTPUT     t        0      0   0   10    1    0    0  nentuds
 122    115    H     OUTPUT     t        0      0   0    4    0    0    0  nerd
 121    113    H     OUTPUT     t        0      0   0    4    0    0    0  newr
  93     89    F     OUTPUT     t        0      0   0    5    1    0    0  nmemreq
  94     91    F     OUTPUT     t        0      0   0    4    1    0    0  nselepfc
 128    117    H     OUTPUT     t        0      0   0    3    0    0    0  nstrobe
  70     75    E     OUTPUT     t        0      0   0    1    1    0    0  nstsvalid


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** BURIED LOGIC **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
   -     90    F       DFFE  +  t        2      2   0    5    0    0    1  busStart
(130)   120    H       DFFE     t        2      2   0   20    0    2    0  dedicatedMode
   -     82    F       DFFE     t        2      2   0    4    2    0    1  dlyIceBrk0
 (99)    96    F       DFFE     t        2      2   0    3    3    1    0  dlyIceBrk1
   -     79    E       DFFE     t        0      0   0    2    1    1    1  epDtackLatch
   -    119    H       DFFE     t        2      2   0   21    0    1    0  et1reg
   -    114    H       DFFE     t        2      2   0   21    0    1    0  et6reg
   -    127    H       DFFE     t        2      2   0   21    0    1    0  et7reg
   -     66    E       DFFE     t        0      0   0    2    0    2    0  indlyLds
 (63)    67    E       DFFE     t        0      0   0    1    0    2    0  indlyUds
(107)   105    G       TFFE  +  t        2      2   0    5    4    0    4  iwct0
(103)   101    G       DFFE  +  t        2      2   0    5    4    0    4  iwct1
   -    106    G       TFFE  +  t        2      2   0    5    4    1    4  iwct2
   -    111    G       TFFE  +  t        2      2   0    5    4    1    4  iwct3
   -     74    E      LCELL     t        1      1   0    5    1    1    1  lIpl0
 (78)    80    E      LCELL     t        1      1   0    5    1    1    1  lIpl1
   -     71    E      LCELL     t        1      1   0    5    1    1    1  lIpl2
   -     87    F       DFFE  +  t        0      0   0    2    1    3    1  nEdmaFF
   -     95    F       DFFE  +  t        0      0   0    3    0    1    2  nstrobeDly
   -     18    B       DFFE  +  t        2      2   0    5    1    1    0  nstsValidFF
(132)   123    H       DFFE     t        2      0   0   20    0    1    0  pbcntBit0
(112)   112    G       TFFE  +  t        3      3   0    6    0    2    4  wct0
   -    103    G       TFFE  +  t        3      3   0    6    1    2    3  wct1
   -     98    G       TFFE  +  t        3      3   0    6    2    2    2  wct2
(105)   102    G       TFFE  +  t        3      3   0    6    3    2    1  wct3
(101)    99    G       TFFE  +  t        3      3   0    6    4    2    0  wct4


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'B':

           Logic cells placed in LAB 'B'
        +- LC18 nstsValidFF
        | 
        |   Other LABs fed by signals
        |   that feed LAB 'B'
LC      | | A B C D E F G H |     Logic cells that feed LAB 'B':

Pin
160  -> * | - * - - * * * * | <-- bmsk8
149  -> * | - * - - - * * * | <-- epAs
159  -> * | - * - - * * * * | <-- epLds
147  -> * | - * - - - * * * | <-- epRw
141  -> * | - * - - * * * * | <-- epUds
139  -> - | - - - - * - - - | <-- iceClk
140  -> - | - - - - * - - - | <-- nenIpl
LC79 -> * | - * * - - - - - | <-- epDtackLatch


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

             Logic cells placed in LAB 'C'
        +--- LC37 ndatavalid
        | +- LC38 nEdma
        | | 
        | |   Other LABs fed by signals
        | |   that feed LAB 'C'
LC      | | | A B C D E F G H |     Logic cells that feed LAB 'C':
LC37 -> * - | - - * - - - - - | <-- ndatavalid

Pin
32   -> - * | - - * - * * * * | <-- eDisCpu
141  -> - - | - * - - * * * * | <-- epUds
139  -> - - | - - - - * - - - | <-- iceClk
140  -> - - | - - - - * - - - | <-- nenIpl
LC79 -> * - | - * * - - - - - | <-- epDtackLatch
LC85 -> - * | - - * - - * * * | <-- nDma
LC87 -> - * | - - * - - * * * | <-- nEdmaFF


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'E':

                                     Logic cells placed in LAB 'E'
        +--------------------------- LC73 brkIack7
        | +------------------------- LC69 dlyLds
        | | +----------------------- LC72 dlyUds
        | | | +--------------------- LC78 ep_A0
        | | | | +------------------- LC79 epDtackLatch
        | | | | | +----------------- LC68 epIpl0
        | | | | | | +--------------- LC70 epIpl1
        | | | | | | | +------------- LC76 epIpl2
        | | | | | | | | +----------- LC66 indlyLds
        | | | | | | | | | +--------- LC67 indlyUds
        | | | | | | | | | | +------- LC74 lIpl0
        | | | | | | | | | | | +----- LC80 lIpl1
        | | | | | | | | | | | | +--- LC71 lIpl2
        | | | | | | | | | | | | | +- LC75 nstsvalid
        | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | |   that feed LAB 'E'
LC      | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'E':
LC66 -> - * * - - - - - - - - - - - | - - - - * - - - | <-- indlyLds
LC67 -> - - * * - - - - - - - - - - | - - - - * - - - | <-- indlyUds
LC74 -> - - - - - * - - - - * - - - | - - - - * - - - | <-- lIpl0
LC80 -> - - - - - - * - - - - * - - | - - - - * - - - | <-- lIpl1
LC71 -> - - - - - - - * - - - - * - | - - - - * - - - | <-- lIpl2

Pin
160  -> - * * * - - - - - - - - - - | - * - - * * * * | <-- bmsk8
146  -> * - - - - - - - - - - - - - | - - - - * * - - | <-- brkAck
32   -> - - - - - * * * - - - - - - | - - * - * * * * | <-- eDisCpu
14   -> - - - - * - - - - - - - - - | - - - - * - - - | <-- epDtack
152  -> - - - - - - - - - - * * * - | - - - - * - - * | <-- epHalt
159  -> - - - - - - - - * - - - - - | - * - - * * * * | <-- epLds
150  -> - - - - - - - - - - * * * - | - - - - * - - * | <-- epRst
141  -> - * * * - - - - - - - - - - | - * - - * * * * | <-- epUds
145  -> - - - - - * * * - - - - - - | - - - - * * - - | <-- iceBrk
139  -> - - - - * - - - * * - - - - | - - - - * - - - | <-- iceClk
140  -> - - - - - * * * - - * * * - | - - - - * - - - | <-- nenIpl
29   -> - - - - - * * * - - * * * - | - - - - * - - - | <-- nenNMI
48   -> - - - - - - - - - - - - - * | - - - - * - - - | <-- qual
59   -> - - - - - * - - - - * - - - | - - - - * - - - | <-- tIpl0
58   -> - - - - - - * - - - - * - - | - - - - * - - - | <-- tIpl1
57   -> - - - - - - - * - - - - * - | - - - - * - - - | <-- tIpl2
LC90 -> - - - - * - - - - - - - - - | - - - - * - - - | <-- busStart
LC120-> - - - - - * * - - - - - - - | - - - - * - - - | <-- dedicatedMode
LC96 -> - - - - - - - * - - - - - - | - - - - * - - - | <-- dlyIceBrk1
LC119-> - - - - - * - - - - - - - - | - - - - * - - - | <-- et1reg
LC114-> - - - - - - * - - - - - - - | - - - - * - - - | <-- et6reg
LC127-> - - - - - - - * - - - - - - | - - - - * - - - | <-- et7reg
LC18 -> - - - - - - - - - - - - - * | - - - - * - - - | <-- nstsValidFF
LC123-> * - - - - - - - - - - - - - | - - - - * - - - | <-- pbcntBit0


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                                         Logic cells placed in LAB 'F'
        +------------------------------- LC90 busStart
        | +----------------------------- LC82 dlyIceBrk0
        | | +--------------------------- LC96 dlyIceBrk1
        | | | +------------------------- LC85 nDma
        | | | | +----------------------- LC87 nEdmaFF
        | | | | | +--------------------- LC93 nemdfcc
        | | | | | | +------------------- LC81 nemsfcc
        | | | | | | | +----------------- LC94 nemvalid
        | | | | | | | | +--------------- LC92 nenepfc
        | | | | | | | | | +------------- LC84 nentas
        | | | | | | | | | | +----------- LC88 nentlds
        | | | | | | | | | | | +--------- LC86 nentrw
        | | | | | | | | | | | | +------- LC83 nentuds
        | | | | | | | | | | | | | +----- LC89 nmemreq
        | | | | | | | | | | | | | | +--- LC91 nselepfc
        | | | | | | | | | | | | | | | +- LC95 nstrobeDly
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'F'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'F':
LC82 -> - - * - - - - - - - - - - - - - | - - - - - * - - | <-- dlyIceBrk0
LC85 -> - * * * - * * * * * * * * * * - | - - * - - * * * | <-- nDma
LC87 -> - - - - * - - - - - - - - - - - | - - * - - * * * | <-- nEdmaFF
LC95 -> - * * - - - - * - - - - - - - - | - - - - - * - - | <-- nstrobeDly

Pin
160  -> * * * - - - - * - - - - * - - * | - * - - * * * * | <-- bmsk8
146  -> - - - - - - - - - * * - * - - - | - - - - * * - - | <-- brkAck
52   -> - - - - - - - - - * - - - - - - | - - - - - * - - | <-- cpenas
54   -> - - - - - - - - - - * - * - - - | - - - - - * - - | <-- cpends
32   -> - - - * - - - - - - - - - - - - | - - * - * * * * | <-- eDisCpu
153  -> - - - - - - - - - * * * * * - - | - - - - - * * * | <-- emuspace
149  -> * - - * - - - - - - - - - - - - | - * - - - * * * | <-- epAs
25   -> - - - * * - - - - - - - - - - - | - - - - - * - - | <-- epBg
10   -> - - - * * - - - - - - - - - - - | - - - - - * - - | <-- epBgack
19   -> - - - - - - - - - * * - * * * - | - - - - - * - - | <-- epfc0
18   -> - - - - - - - - - * * - * * * - | - - - - - * - - | <-- epfc1
13   -> - - - - - - - - - * * - * * * - | - - - - - * - - | <-- epfc2
159  -> * * * - - - - * - - - - - - - * | - * - - * * * * | <-- epLds
147  -> * - - - - - - - - - - - - - - - | - * - - - * * * | <-- epRw
141  -> * * * - - - - * - - - - - - - * | - * - - * * * * | <-- epUds
144  -> - - - - - - - - - * * - * - - - | - - - - - * * - | <-- exRdy
158  -> - - - - - - - - - * * - * * - - | - - - - - * * * | <-- iac
145  -> - * - - - - - - - - - - - - * - | - - - - * * - - | <-- iceBrk
139  -> - - - - - - - - - - - - - - - - | - - - - * - - - | <-- iceClk
15   -> - - - - - * - - * - - - - - - - | - - - - - * - - | <-- nemdfc
78   -> - - - - - - * - * - - - - - - - | - - - - - * - - | <-- nemsfc
140  -> - - - - - - - - - - - - - - - - | - - - - * - - - | <-- nenIpl
151  -> - - - - - - - - - * * - * - - - | - - - - - * * * | <-- nmhere
56   -> - - - - - - - - - - - * - - - - | - - - - - * - - | <-- nRdOnly


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'G':

                                         Logic cells placed in LAB 'G'
        +------------------------------- LC104 dirpbdh
        | +----------------------------- LC108 dirpbdl
        | | +--------------------------- LC110 dirpbd8
        | | | +------------------------- LC109 Fdtack
        | | | | +----------------------- LC107 flagNotRdy
        | | | | | +--------------------- LC105 iwct0
        | | | | | | +------------------- LC101 iwct1
        | | | | | | | +----------------- LC106 iwct2
        | | | | | | | | +--------------- LC111 iwct3
        | | | | | | | | | +------------- LC97 nenTcs
        | | | | | | | | | | +----------- LC100 nentdl
        | | | | | | | | | | | +--------- LC112 wct0
        | | | | | | | | | | | | +------- LC103 wct1
        | | | | | | | | | | | | | +----- LC98 wct2
        | | | | | | | | | | | | | | +--- LC102 wct3
        | | | | | | | | | | | | | | | +- LC99 wct4
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'G'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'G':
LC109-> - - - * - - - - - - - - - - - - | - - - - - - * - | <-- Fdtack
LC107-> - - - - * - - - - - - - - - - - | - - - - - - * - | <-- flagNotRdy
LC105-> - - - - - * * * * - - - - - - - | - - - - - - * - | <-- iwct0
LC101-> - - - - - * * * * - - - - - - - | - - - - - - * - | <-- iwct1
LC106-> - - - * - * * * * - - - - - - - | - - - - - - * - | <-- iwct2
LC111-> - - - * - * * * * - - - - - - - | - - - - - - * - | <-- iwct3
LC112-> - - - * * - - - - - - * * * * * | - - - - - - * - | <-- wct0
LC103-> - - - * * - - - - - - - * * * * | - - - - - - * - | <-- wct1
LC98 -> - - - * * - - - - - - - - * * * | - - - - - - * - | <-- wct2
LC102-> - - - * * - - - - - - - - - * * | - - - - - - * - | <-- wct3
LC99 -> - - - * * - - - - - - - - - - * | - - - - - - * - | <-- wct4

Pin
160  -> - - - * - * * * * - * * * * * * | - * - - * * * * | <-- bmsk8
51   -> - - - - * - - - - - - - - - - - | - - - - - - * - | <-- disnrdy
32   -> - - - - - - - - - - * - - - - - | - - * - * * * * | <-- eDisCpu
153  -> * * * - - - - - - * * - - - - - | - - - - - * * * | <-- emuspace
149  -> - - - * - * * * * - - * * * * * | - * - - - * * * | <-- epAs
132  -> - - - - * - - - - - - - - - - - | - - - - - - * - | <-- epGo
159  -> - - - * - * * * * - - * * * * * | - * - - * * * * | <-- epLds
147  -> * * * * - * * * * - - * * * * * | - * - - - * * * | <-- epRw
141  -> - - - * - * * * * - - * * * * * | - * - - * * * * | <-- epUds
144  -> - - - * - - - - - - - - - - - - | - - - - - * * - | <-- exRdy
158  -> * * * * - - - - - - * - - - - - | - - - - - * * * | <-- iac
139  -> - - - - - - - - - - - - - - - - | - - - - * - - - | <-- iceClk
28   -> - - - * - - - - - - - - - - - - | - - - - - - * - | <-- iceRdy
41   -> - - - * - - - - - - - * * * * * | - - - - - - * - | <-- nCsActive_I
140  -> - - - - - - - - - - - - - - - - | - - - - * - - - | <-- nenIpl
50   -> - * * - - - - - - - * - - - - - | - - - - - - * * | <-- ninshi
130  -> * - * - - - - - - - * - - - - - | - - - - - - * - | <-- ninslow
151  -> * * * * - - - - - - * - - - - - | - - - - - * * * | <-- nmhere
LC85 -> * * * - - - - - - * * - - - - - | - - * - - * * * | <-- nDma
LC87 -> - - - - - - - - - - * - - - - - | - - * - - * * * | <-- nEdmaFF


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

                                       Logic cells placed in LAB 'H'
        +----------------------------- LC120 dedicatedMode
        | +--------------------------- LC119 et1reg
        | | +------------------------- LC114 et6reg
        | | | +----------------------- LC127 et7reg
        | | | | +--------------------- LC118 nadvalid
        | | | | | +------------------- LC121 nenHiByteO
        | | | | | | +----------------- LC116 nenLowByteO
        | | | | | | | +--------------- LC128 nenpba
        | | | | | | | | +------------- LC126 nenpbd
        | | | | | | | | | +----------- LC125 nenpbd8
        | | | | | | | | | | +--------- LC124 nentdh
        | | | | | | | | | | | +------- LC115 nerd
        | | | | | | | | | | | | +----- LC113 newr
        | | | | | | | | | | | | | +--- LC117 nstrobe
        | | | | | | | | | | | | | | +- LC123 pbcntBit0
        | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | |   that feed LAB 'H'
LC      | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'H':

Pin
160  -> * * * * - * - - * * * * * * * | - * - - * * * * | <-- bmsk8
32   -> - - - - - - - - - - * - - - - | - - * - * * * * | <-- eDisCpu
153  -> * * * * - - - - - - * - - - * | - - - - - * * * | <-- emuspace
149  -> - - - - * - - - * * - - - - - | - * - - - * * * | <-- epAs
72   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA1
105  -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA2
103  -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA3
101  -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA4
62   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA5
49   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA6
107  -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA7
63   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA8
43   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA9
23   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA10
24   -> * * * * - - - - - - - - - - * | - - - - - - - * | <-- epA11
16   -> - - - - - - - - - - - - - - * | - - - - - - - * | <-- epD0
20   -> - * - - - - - - - - - - - - - | - - - - - - - * | <-- epD8
11   -> - - * - - - - - - - - - - - - | - - - - - - - * | <-- epD9
33   -> - - - * - - - - - - - - - - - | - - - - - - - * | <-- epD10
21   -> * * * * - - - - - - - - - - - | - - - - - - - * | <-- epD15
152  -> * * * * - - - - - - - - - - * | - - - - * - - * | <-- epHalt
159  -> * * * * - - * - - - - * * * * | - * - - * * * * | <-- epLds
150  -> * * * * - - - - - - - - - - * | - - - - * - - * | <-- epRst
147  -> * * * * - * * - * * - * * - * | - * - - - * * * | <-- epRw
27   -> - - - - - * * - * * - - - - - | - - - - - - - * | <-- epStop
141  -> * * * * - * - - - - - * * * * | - * - - * * * * | <-- epUds
158  -> * * * * - - - - - - * - - - * | - - - - - * * * | <-- iac
139  -> - - - - - - - - - - - - - - - | - - - - * - - - | <-- iceClk
53   -> - - - - - - - * * * - - - - - | - - - - - - - * | <-- isoep
140  -> - - - - - - - - - - - - - - - | - - - - * - - - | <-- nenIpl
50   -> - - - - - - - - - - * - - - - | - - - - - - * * | <-- ninshi
151  -> - - - - - - - - - - * - - - - | - - - - - * * * | <-- nmhere
LC85 -> - - - - - * * - * * * - - - - | - - * - - * * * | <-- nDma
LC87 -> - - - - - - - - - - * - - - - | - - * - - * * * | <-- nEdmaFF


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                      c:\hd302\hd302c1\hd302c1.rpt
hd302c1

** EQUATIONS **

bmsk8    : INPUT;
brkAck   : INPUT;
cpenas   : INPUT;
cpends   : INPUT;
disnrdy  : INPUT;
eDisCpu  : INPUT;
emuspace : INPUT;
epAs     : INPUT;
epA1     : INPUT;
epA2     : INPUT;
epA3     : INPUT;
epA4     : INPUT;
epA5     : INPUT;
epA6     : INPUT;
epA7     : INPUT;
epA8     : INPUT;
epA9     : INPUT;
epA10    : INPUT;
epA11    : INPUT;
epBg     : INPUT;
epBgack  : INPUT;
epDtack  : INPUT;
epD0     : INPUT;
epD8     : INPUT;
epD9     : INPUT;
epD10    : INPUT;
epD15    : INPUT;
epfc0    : INPUT;
epfc1    : INPUT;
epfc2    : INPUT;
epGo     : INPUT;
epHalt   : INPUT;
epLds    : INPUT;
epRst    : INPUT;
epRw     : INPUT;
epStop   : INPUT;
epUds    : INPUT;
exRdy    : INPUT;
iac      : INPUT;
iceBrk   : INPUT;
iceClk   : INPUT;
iceRdy   : INPUT;
isoep    : INPUT;
nCsActive_I : INPUT;
nemdfc   : INPUT;
nemsfc   : INPUT;
nenIpl   : INPUT;
nenNMI   : INPUT;
ninshi   : INPUT;
ninslow  : INPUT;
nmhere   : INPUT;
nRdOnly  : INPUT;
qual     : INPUT;
tIpl0    : INPUT;
tIpl1    : INPUT;
tIpl2    : INPUT;

-- Node name is 'brkIack7' 
-- Equation name is 'brkIack7', location is LC073, type is output.
 brkIack7 = LCELL( _EQ001 $  GND);
  _EQ001 =  brkAck &  pbcntBit0;

-- Node name is 'busStart' from file "hd302c1.tdf" line 130, column 1
-- Equation name is 'busStart', location is LC090, type is buried.
busStart = DFFE( GND $  VCC, GLOBAL( iceClk), !_EQ002,  VCC,  VCC);
  _EQ002 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'dedicatedMode' from file "hd302c1.tdf" line 115, column 1
-- Equation name is 'dedicatedMode', location is LC120, type is buried.
dedicatedMode = DFFE( epD15 $  GND,  _EQ003, !_EQ004,  VCC,  VCC);
  _EQ003 =  _X003 &  _X004;
  _X003  = EXP(!bmsk8 &  emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & 
             !epA7 & !epA8 & !epA9 & !epA10 &  epA11 & !epRw & !epUds &  iac);
  _X004  = EXP( emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & !epA7 & 
             !epA8 & !epA9 & !epA10 &  epA11 & !epLds & !epRw & !epUds &  iac);
  _EQ004 = !epHalt & !epRst;

-- Node name is 'dirpbdh' 
-- Equation name is 'dirpbdh', location is LC104, type is output.
 dirpbdh = LCELL( _EQ005 $  iac);
  _EQ005 =  emuspace & !iac &  nDma &  ninslow &  nmhere
         # !iac & !nDma &  nmhere
         # !epRw & !iac;

-- Node name is 'dirpbdl' 
-- Equation name is 'dirpbdl', location is LC108, type is output.
 dirpbdl = LCELL( _EQ006 $  iac);
  _EQ006 =  emuspace & !iac &  nDma &  ninshi &  nmhere
         # !iac & !nDma &  nmhere
         # !epRw & !iac;

-- Node name is 'dirpbd8' 
-- Equation name is 'dirpbd8', location is LC110, type is output.
 dirpbd8 = LCELL( _EQ007 $  iac);
  _EQ007 =  emuspace & !iac &  nDma &  ninshi &  ninslow &  nmhere
         # !iac & !nDma &  nmhere
         # !epRw & !iac;

-- Node name is 'dlyIceBrk0' from file "hd302c1.tdf" line 112, column 10
-- Equation name is 'dlyIceBrk0', location is LC082, type is buried.
dlyIceBrk0 = DFFE( iceBrk $  GND,  _EQ008,  VCC,  VCC,  VCC);
  _EQ008 =  _X005 &  _X006;
  _X005  = EXP(!epLds &  nDma & !nstrobeDly);
  _X006  = EXP(!bmsk8 & !epUds &  nDma & !nstrobeDly);

-- Node name is 'dlyIceBrk1' from file "hd302c1.tdf" line 112, column 10
-- Equation name is 'dlyIceBrk1', location is LC096, type is buried.
dlyIceBrk1 = DFFE( dlyIceBrk0 $  GND,  _EQ009,  VCC,  VCC,  VCC);
  _EQ009 =  _X005 &  _X006;
  _X005  = EXP(!epLds &  nDma & !nstrobeDly);
  _X006  = EXP(!bmsk8 & !epUds &  nDma & !nstrobeDly);

-- Node name is 'dlyLds' 
-- Equation name is 'dlyLds', location is LC069, type is output.
 dlyLds  = LCELL( _EQ010 $  indlyLds);
  _EQ010 =  bmsk8 & !epUds & !indlyLds;

-- Node name is 'dlyUds' 
-- Equation name is 'dlyUds', location is LC072, type is output.
 dlyUds  = LCELL( _EQ011 $  bmsk8);
  _EQ011 =  bmsk8 & !epUds & !indlyLds
         # !bmsk8 &  indlyUds;

-- Node name is 'ep_A0' 
-- Equation name is 'ep_A0', location is LC078, type is output.
 ep_A0   = LCELL( _EQ012 $  GND);
  _EQ012 =  bmsk8 &  epUds
         # !bmsk8 &  indlyUds;

-- Node name is 'epDtackLatch' from file "hd302c1.tdf" line 131, column 1
-- Equation name is 'epDtackLatch', location is LC079, type is buried.
epDtackLatch = DFFE( epDtack $  GND, !iceClk,  VCC,  busStart,  VCC);

-- Node name is 'epIpl0' 
-- Equation name is 'epIpl0', location is LC068, type is output.
 epIpl0  = LCELL( _EQ013 $ !eDisCpu);
  _EQ013 = !eDisCpu & !et1reg & !nenIpl & !nenNMI & !tIpl0
         # !dedicatedMode & !eDisCpu & !et1reg &  iceBrk
         # !eDisCpu &  et1reg & !lIpl0
         #  eDisCpu &  tIpl0;

-- Node name is 'epIpl1' 
-- Equation name is 'epIpl1', location is LC070, type is output.
 epIpl1  = LCELL( _EQ014 $ !eDisCpu);
  _EQ014 = !eDisCpu & !et6reg & !nenIpl & !nenNMI & !tIpl1
         # !dedicatedMode & !eDisCpu & !et6reg &  iceBrk
         # !eDisCpu &  et6reg & !lIpl1
         #  eDisCpu &  tIpl1;

-- Node name is 'epIpl2' 
-- Equation name is 'epIpl2', location is LC076, type is output.
 epIpl2  = LCELL( _EQ015 $  VCC);
  _EQ015 = !eDisCpu &  et7reg & !lIpl2 & !nenIpl & !nenNMI
         # !et7reg & !nenIpl & !nenNMI & !tIpl2
         # !eDisCpu &  iceBrk &  _X007
         #  eDisCpu & !tIpl2;
  _X007  = EXP( dlyIceBrk1 &  et7reg &  lIpl2);

-- Node name is 'et1reg' from file "hd302c1.tdf" line 118, column 1
-- Equation name is 'et1reg', location is LC119, type is buried.
et1reg   = DFFE( _EQ016 $  GND,  _EQ017, !_EQ018,  VCC,  VCC);
  _EQ016 =  epD8 &  epD15;
  _EQ017 =  _X003 &  _X004;
  _X003  = EXP(!bmsk8 &  emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & 
             !epA7 & !epA8 & !epA9 & !epA10 &  epA11 & !epRw & !epUds &  iac);
  _X004  = EXP( emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & !epA7 & 
             !epA8 & !epA9 & !epA10 &  epA11 & !epLds & !epRw & !epUds &  iac);
  _EQ018 = !epHalt & !epRst;

-- Node name is 'et6reg' from file "hd302c1.tdf" line 117, column 1
-- Equation name is 'et6reg', location is LC114, type is buried.
et6reg   = DFFE( _EQ019 $  GND,  _EQ020, !_EQ021,  VCC,  VCC);
  _EQ019 =  epD9 &  epD15;
  _EQ020 =  _X003 &  _X004;
  _X003  = EXP(!bmsk8 &  emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & 
             !epA7 & !epA8 & !epA9 & !epA10 &  epA11 & !epRw & !epUds &  iac);
  _X004  = EXP( emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & !epA7 & 
             !epA8 & !epA9 & !epA10 &  epA11 & !epLds & !epRw & !epUds &  iac);
  _EQ021 = !epHalt & !epRst;

-- Node name is 'et7reg' from file "hd302c1.tdf" line 116, column 1
-- Equation name is 'et7reg', location is LC127, type is buried.
et7reg   = DFFE( _EQ022 $  GND,  _EQ023, !_EQ024,  VCC,  VCC);
  _EQ022 =  epD10 &  epD15;
  _EQ023 =  _X003 &  _X004;
  _X003  = EXP(!bmsk8 &  emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & 
             !epA7 & !epA8 & !epA9 & !epA10 &  epA11 & !epRw & !epUds &  iac);
  _X004  = EXP( emuspace &  epA1 & !epA2 & !epA3 &  epA4 & !epA5 & !epA6 & !epA7 & 
             !epA8 & !epA9 & !epA10 &  epA11 & !epLds & !epRw & !epUds &  iac);
  _EQ024 = !epHalt & !epRst;

-- Node name is 'Fdtack' = 'forceDtack' from file "hd302c1.tdf" line 139, column 1
-- Equation name is 'Fdtack', location is LC109, type is output.
 Fdtack  = DFFE( _EQ025 $  VCC, GLOBAL( iceClk), !_EQ026,  VCC,  VCC);
  _EQ025 = !Fdtack &  _X008 &  _X009 &  _X010 &  _X011 &  _X012 &  _X013 & 
              _X014;
  _X008  = EXP( wct0 &  wct1 &  wct2 &  wct3 &  wct4);
  _X009  = EXP(!exRdy & !iac &  iwct2 &  iwct3 & !nCsActive_I & !nmhere);
  _X010  = EXP(!exRdy & !iac &  iwct3 &  nCsActive_I & !nmhere);
  _X011  = EXP(!exRdy & !iac &  iwct2 &  nCsActive_I & !nmhere);
  _X012  = EXP( iceRdy &  iwct2 &  iwct3 & !nCsActive_I);
  _X013  = EXP( iceRdy &  iwct3 &  nCsActive_I);
  _X014  = EXP( iceRdy &  iwct2 &  nCsActive_I);
  _EQ026 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'flagNotRdy' = 'flagNotRdyFF' from file "hd302c1.tdf" line 138, column 1
-- Equation name is 'flagNotRdy', location is LC107, type is output.
 flagNotRdy = TFFE( _EQ027, GLOBAL( iceClk), !epGo,  VCC,  VCC);
  _EQ027 = !disnrdy & !flagNotRdy &  wct0 &  wct1 &  wct2 &  wct3 &  wct4;

-- Node name is 'indlyLds' from file "hd302c1.tdf" line 125, column 1
-- Equation name is 'indlyLds', location is LC066, type is buried.
indlyLds = DFFE( GND $  VCC, !iceClk,  epLds,  VCC,  VCC);

-- Node name is 'indlyUds' from file "hd302c1.tdf" line 124, column 1
-- Equation name is 'indlyUds', location is LC067, type is buried.
indlyUds = DFFE( GND $  VCC, !iceClk, GLOBAL( epUds),  VCC,  VCC);

-- Node name is 'iwct0' from file "hd302c1.tdf" line 141, column 5
-- Equation name is 'iwct0', location is LC105, type is buried.
iwct0    = TFFE(!_EQ028, GLOBAL( iceClk), !_EQ029,  VCC,  VCC);
  _EQ028 =  iwct0 &  iwct1 &  iwct2 &  iwct3;
  _EQ029 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'iwct1' from file "hd302c1.tdf" line 141, column 5
-- Equation name is 'iwct1', location is LC101, type is buried.
iwct1    = DFFE( _EQ030 $  GND, GLOBAL( iceClk), !_EQ031,  VCC,  VCC);
  _EQ030 =  iwct0 &  iwct1 &  iwct2 &  iwct3
         # !iwct0 &  iwct1
         #  iwct0 & !iwct1;
  _EQ031 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'iwct2' from file "hd302c1.tdf" line 141, column 5
-- Equation name is 'iwct2', location is LC106, type is buried.
iwct2    = TFFE( _EQ032, GLOBAL( iceClk), !_EQ033,  VCC,  VCC);
  _EQ032 =  iwct0 &  iwct1 &  iwct2 & !iwct3
         #  iwct0 &  iwct1 & !iwct2;
  _EQ033 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'iwct3' from file "hd302c1.tdf" line 141, column 5
-- Equation name is 'iwct3', location is LC111, type is buried.
iwct3    = TFFE( _EQ034, GLOBAL( iceClk), !_EQ035,  VCC,  VCC);
  _EQ034 =  iwct0 &  iwct1 &  iwct2 & !iwct3;
  _EQ035 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'lIpl0' from file "hd302c1.tdf" line 204, column 11
-- Equation name is 'lIpl0', location is LC074, type is buried.
lIpl0    = LCELL( _EQ036 $  GND);
  _EQ036 =  lIpl0 &  nenIpl &  _X015
         #  lIpl0 &  nenNMI &  _X015
         # !epHalt & !epRst &  tIpl0
         # !nenIpl & !nenNMI &  tIpl0;
  _X015  = EXP(!epHalt & !epRst);

-- Node name is 'lIpl1' from file "hd302c1.tdf" line 205, column 11
-- Equation name is 'lIpl1', location is LC080, type is buried.
lIpl1    = LCELL( _EQ037 $  GND);
  _EQ037 =  lIpl1 &  nenIpl &  _X015
         #  lIpl1 &  nenNMI &  _X015
         # !epHalt & !epRst &  tIpl1
         # !nenIpl & !nenNMI &  tIpl1;
  _X015  = EXP(!epHalt & !epRst);

-- Node name is 'lIpl2' from file "hd302c1.tdf" line 206, column 11
-- Equation name is 'lIpl2', location is LC071, type is buried.
lIpl2    = LCELL( _EQ038 $  GND);
  _EQ038 =  lIpl2 &  nenIpl &  _X015
         #  lIpl2 &  nenNMI &  _X015
         # !epHalt & !epRst &  tIpl2
         # !nenIpl & !nenNMI &  tIpl2;
  _X015  = EXP(!epHalt & !epRst);

-- Node name is 'nadvalid' 
-- Equation name is 'nadvalid', location is LC118, type is output.
 nadvalid = LCELL( epAs $  GND);

-- Node name is 'ndatavalid' = 'ndataValidFF' from file "hd302c1.tdf" line 132, column 1
-- Equation name is 'ndatavalid', location is LC037, type is output.
 ndatavalid = DFFE( _EQ039 $  VCC, GLOBAL( iceClk),  VCC,  VCC,  VCC);
  _EQ039 = !epDtackLatch &  ndatavalid;

-- Node name is 'nDma' = 'nDmaFF' from file "hd302c1.tdf" line 127, column 1
-- Equation name is 'nDma', location is LC085, type is output.
 nDma    = DFFE( _EQ040 $  GND, GLOBAL( iceClk), !eDisCpu, !_EQ041,  VCC);
  _EQ040 = !epAs &  nDma;
  _EQ041 = !eDisCpu &  epBg &  epBgack;

-- Node name is 'nEdma' 
-- Equation name is 'nEdma', location is LC038, type is output.
 nEdma   = LCELL( _EQ042 $ !eDisCpu);
  _EQ042 = !eDisCpu & !nDma & !nEdmaFF;

-- Node name is 'nEdmaFF' from file "hd302c1.tdf" line 128, column 1
-- Equation name is 'nEdmaFF', location is LC087, type is buried.
nEdmaFF  = DFFE( _EQ043 $  GND, GLOBAL( iceClk),  VCC, !_EQ044,  VCC);
  _EQ043 =  epBg &  nEdmaFF;
  _EQ044 =  epBg &  epBgack;

-- Node name is 'nemdfcc' 
-- Equation name is 'nemdfcc', location is LC093, type is output.
 nemdfcc = LCELL( _EQ045 $  VCC);
  _EQ045 =  nDma & !nemdfc;

-- Node name is 'nemsfcc' 
-- Equation name is 'nemsfcc', location is LC081, type is output.
 nemsfcc = LCELL( _EQ046 $  VCC);
  _EQ046 =  nDma & !nemsfc;

-- Node name is 'nemvalid' 
-- Equation name is 'nemvalid', location is LC094, type is output.
 nemvalid = LCELL( _EQ047 $  VCC);
  _EQ047 = !bmsk8 & !epUds &  nDma & !nstrobeDly
         # !epLds &  nDma & !nstrobeDly;

-- Node name is 'nenepfc' 
-- Equation name is 'nenepfc', location is LC092, type is output.
 nenepfc = LCELL( _EQ048 $  nDma);
  _EQ048 =  nDma &  nemdfc &  nemsfc;

-- Node name is 'nenHiByteO' 
-- Equation name is 'nenHiByteO', location is LC121, type is output.
 nenHiByteO = LCELL( _EQ049 $  VCC);
  _EQ049 = !bmsk8 &  epRw &  epStop & !epUds &  nDma;

-- Node name is 'nenLowByteO' 
-- Equation name is 'nenLowByteO', location is LC116, type is output.
 nenLowByteO = LCELL( _EQ050 $  VCC);
  _EQ050 = !epLds &  epRw &  epStop &  nDma;

-- Node name is 'nenpba' 
-- Equation name is 'nenpba', location is LC128, type is output.
 nenpba  = LCELL( isoep $  GND);

-- Node name is 'nenpbd' 
-- Equation name is 'nenpbd', location is LC126, type is output.
 nenpbd  = LCELL( _EQ051 $  bmsk8);
  _EQ051 = !bmsk8 &  epAs &  epRw &  nDma
         # !bmsk8 &  epStop &  nDma
         # !bmsk8 &  isoep;

-- Node name is 'nenpbd8' 
-- Equation name is 'nenpbd8', location is LC125, type is output.
 nenpbd8 = LCELL( _EQ052 $  VCC);
  _EQ052 =  bmsk8 & !epRw & !epStop & !isoep
         #  bmsk8 & !epAs & !epStop & !isoep
         #  bmsk8 & !isoep & !nDma;

-- Node name is 'nentas' 
-- Equation name is 'nentas', location is LC084, type is output.
 nentas  = LCELL( _EQ053 $  GND);
  _EQ053 =  brkAck &  epfc0 &  epfc1 &  epfc2 &  nDma
         # !cpenas & !exRdy & !iac &  nDma & !nmhere
         # !cpenas & !emuspace &  nDma;

-- Node name is 'nenTcs' 
-- Equation name is 'nenTcs', location is LC097, type is output.
 nenTcs  = LCELL( _EQ054 $  GND);
  _EQ054 = !emuspace &  nDma;

-- Node name is 'nentdh' 
-- Equation name is 'nentdh', location is LC124, type is output.
 nentdh  = LCELL( _EQ055 $  GND);
  _EQ055 = !bmsk8 & !eDisCpu &  nDma & !ninshi
         # !eDisCpu & !iac &  nDma & !nmhere
         # !eDisCpu & !iac &  nEdmaFF & !nmhere
         # !eDisCpu & !emuspace &  nDma;

-- Node name is 'nentdl' 
-- Equation name is 'nentdl', location is LC100, type is output.
 nentdl  = LCELL( _EQ056 $  GND);
  _EQ056 =  bmsk8 & !eDisCpu &  nDma & !ninshi
         # !eDisCpu & !iac &  nDma & !nmhere
         # !eDisCpu & !iac &  nEdmaFF & !nmhere
         # !eDisCpu &  nDma & !ninslow
         # !eDisCpu & !emuspace &  nDma;

-- Node name is 'nentlds' 
-- Equation name is 'nentlds', location is LC088, type is output.
 nentlds = LCELL( _EQ057 $  GND);
  _EQ057 =  brkAck &  epfc0 &  epfc1 &  epfc2 &  nDma
         # !cpends & !exRdy & !iac &  nDma & !nmhere
         # !cpends & !emuspace &  nDma;

-- Node name is 'nentrw' 
-- Equation name is 'nentrw', location is LC086, type is output.
 nentrw  = LCELL( _EQ058 $  nDma);
  _EQ058 =  emuspace &  nDma &  nRdOnly;

-- Node name is 'nentuds' 
-- Equation name is 'nentuds', location is LC083, type is output.
 nentuds = LCELL( _EQ059 $  GND);
  _EQ059 = !bmsk8 &  brkAck &  epfc0 &  epfc1 &  epfc2 &  nDma
         # !bmsk8 & !cpends & !exRdy & !iac &  nDma & !nmhere
         # !bmsk8 & !cpends & !emuspace &  nDma;

-- Node name is 'nerd' 
-- Equation name is 'nerd', location is LC115, type is output.
 nerd    = LCELL( _EQ060 $  VCC);
  _EQ060 = !bmsk8 &  epRw & !epUds
         # !epLds &  epRw;

-- Node name is 'newr' 
-- Equation name is 'newr', location is LC113, type is output.
 newr    = LCELL( _EQ061 $  VCC);
  _EQ061 = !bmsk8 & !epRw & !epUds
         # !epLds & !epRw;

-- Node name is 'nmemreq' 
-- Equation name is 'nmemreq', location is LC089, type is output.
 nmemreq = LCELL( _EQ062 $  iac);
  _EQ062 =  epfc0 &  epfc1 &  epfc2 & !iac
         # !emuspace & !iac &  nDma;

-- Node name is 'nselepfc' 
-- Equation name is 'nselepfc', location is LC091, type is output.
 nselepfc = LCELL( _EQ063 $  GND);
  _EQ063 =  epfc0 &  epfc1 &  epfc2 &  iceBrk &  nDma;

-- Node name is 'nstrobe' 
-- Equation name is 'nstrobe', location is LC117, type is output.
 nstrobe = LCELL( _EQ064 $  epLds);
  _EQ064 = !bmsk8 &  epLds & !epUds;

-- Node name is 'nstrobeDly' from file "hd302c1.tdf" line 129, column 1
-- Equation name is 'nstrobeDly', location is LC095, type is buried.
nstrobeDly = DFFE( _EQ065 $  epLds, GLOBAL( iceClk),  VCC,  VCC,  VCC);
  _EQ065 = !bmsk8 &  epLds & !epUds;

-- Node name is 'nstsvalid' 
-- Equation name is 'nstsvalid', location is LC075, type is output.
 nstsvalid = LCELL( _EQ066 $  GND);
  _EQ066 =  nstsValidFF &  qual;

-- Node name is 'nstsValidFF' from file "hd302c1.tdf" line 133, column 1
-- Equation name is 'nstsValidFF', location is LC018, type is buried.
nstsValidFF = DFFE(!epDtackLatch $  GND, GLOBAL( iceClk), !_EQ067,  VCC,  VCC);
  _EQ067 =  epLds &  _X001 &  _X002;
  _X001  = EXP(!epAs & !epRw);
  _X002  = EXP(!bmsk8 & !epUds);

-- Node name is 'pbcntBit0' from file "hd302c1.tdf" line 121, column 1
-- Equation name is 'pbcntBit0', location is LC123, type is buried.
pbcntBit0 = DFFE( epD0 $  GND,  _EQ068, !_EQ069,  VCC,  VCC);
  _EQ068 =  _X016 &  _X017;
  _X016  = EXP(!bmsk8 &  emuspace & !epA1 &  epA2 & !epA3 & !epA4 &  epA5 & !epA6 & 
             !epA7 & !epA8 & !epA9 & !epA10 &  epA11 & !epLds & !epRw &  iac);
  _X017  = EXP( bmsk8 &  emuspace & !epA1 &  epA2 & !epA3 & !epA4 &  epA5 & !epA6 & 
             !epA7 & !epA8 & !epA9 & !epA10 &  epA11 & !epLds & !epRw & 
              epUds &  iac);
  _EQ069 = !epHalt & !epRst;

-- Node name is 'wct0' from file "hd302c1.tdf" line 137, column 4
-- Equation name is 'wct0', location is LC112, type is buried.
wct0     = TFFE( VCC, GLOBAL( iceClk), !_EQ070,  VCC,  VCC);
  _EQ070 =  _X018 &  _X019 &  _X020;
  _X018  = EXP(!epAs & !epRw &  nCsActive_I);
  _X019  = EXP(!bmsk8 & !epUds &  nCsActive_I);
  _X020  = EXP(!epLds &  nCsActive_I);

-- Node name is 'wct1' from file "hd302c1.tdf" line 137, column 4
-- Equation name is 'wct1', location is LC103, type is buried.
wct1     = TFFE( wct0, GLOBAL( iceClk), !_EQ071,  VCC,  VCC);
  _EQ071 =  _X018 &  _X019 &  _X020;
  _X018  = EXP(!epAs & !epRw &  nCsActive_I);
  _X019  = EXP(!bmsk8 & !epUds &  nCsActive_I);
  _X020  = EXP(!epLds &  nCsActive_I);

-- Node name is 'wct2' from file "hd302c1.tdf" line 137, column 4
-- Equation name is 'wct2', location is LC098, type is buried.
wct2     = TFFE( _EQ072, GLOBAL( iceClk), !_EQ073,  VCC,  VCC);
  _EQ072 =  wct0 &  wct1;
  _EQ073 =  _X018 &  _X019 &  _X020;
  _X018  = EXP(!epAs & !epRw &  nCsActive_I);
  _X019  = EXP(!bmsk8 & !epUds &  nCsActive_I);
  _X020  = EXP(!epLds &  nCsActive_I);

-- Node name is 'wct3' from file "hd302c1.tdf" line 137, column 4
-- Equation name is 'wct3', location is LC102, type is buried.
wct3     = TFFE( _EQ074, GLOBAL( iceClk), !_EQ075,  VCC,  VCC);
  _EQ074 =  wct0 &  wct1 &  wct2;
  _EQ075 =  _X018 &  _X019 &  _X020;
  _X018  = EXP(!epAs & !epRw &  nCsActive_I);
  _X019  = EXP(!bmsk8 & !epUds &  nCsActive_I);
  _X020  = EXP(!epLds &  nCsActive_I);

-- Node name is 'wct4' from file "hd302c1.tdf" line 137, column 4
-- Equation name is 'wct4', location is LC099, type is buried.
wct4     = TFFE( _EQ076, GLOBAL( iceClk), !_EQ077,  VCC,  VCC);
  _EQ076 =  wct0 &  wct1 &  wct2 &  wct3;
  _EQ077 =  _X018 &  _X019 &  _X020;
  _X018  = EXP(!epAs & !epRw &  nCsActive_I);
  _X019  = EXP(!bmsk8 & !epUds &  nCsActive_I);
  _X020  = EXP(!epLds &  nCsActive_I);



--     Shareable expanders that are duplicated in multiple LABs:
--    _X001 occurs in LABs -B---FG-
--    _X002 occurs in LABs -B---FG-




Project Information                               c:\hd302\hd302c1\hd302c1.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Standard

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'MAX7000E' family

      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      PARALLEL_EXPANDERS                  = off
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SOFT_BUFFER_INSERTION               = on
      SUBFACTOR_EXTRACTION                = on
      TURBO_BIT                           = on
      XOR_SYNTHESIS                       = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic I/O Cell Registers        = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      One-Hot State Machine Encoding      = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = on

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Smart Recompile                           = off
Total Recompile                           = off

Interface Menu Commands
-----------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:02
   Database Builder                       00:00:01
   Logic Synthesizer                      00:00:01
   Partitioner                            00:00:01
   Fitter                                 00:00:03
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:08


Memory Allocated
-----------------

Peak memory allocated during compilation  = 3,264K
