PowerViews 2.2m
Feb 15, 1995

Table of Contents:
Part 1: PowerViews 2.2m Release
Part 2: All PowerTools Development Systems
     I. System Requirements
    II. Problems
   III. PowerViews Application Notes
    IV. PowerViews Limits
Part 4: PowerPack(tm) Emulators
     I: Problems
    II. PowerPack Emulator Application Notes
   III. PowerPack Emulator Limits
Part 5: PowerScope(tm) Hardware-Assisted Debugger
     I. PowerScope Debugger Application Notes
    II. PowerScope Hardware-Assisted Debugger Limits


Part 1: PowerViews 2.2m Release

  New features in this release:

  * Support MMU mode for MC68040 and MC68LC040 CPUs.  The address is
    postfixed an 'L' or 'P' specifying Logical or Physical address is
    acceptable.

  * For MC68040 and MC68LC040, Status Window displays MMU status.

  * Use "xlt" shell command to translate logical address to physical address.

  * Support FPU and MMU registers display/modification for 68040 CPU.
    Use shell commands "freg" and "mreg" to display/modify the registers
    respectively.

  * Support 68040 companion mode coupling 68360 CPU.  The user may change
    the default setting "UseCpu=none" at [PeripheralInfo] in PWRVIEWS.INI
    to "UseCpu=360" if this feature is applicable.

  * Also for 68040 companion mode, it supports multiple QUICC slave
    system up to 31 QUICC slaves. Opening the peripheral window, the
    default is single QUICC (ID=0). To look at the peripherals of
    other QUICC slaves, choose Edit/Go To QUICC... menu item, then
    enter the QUICC ID.

  * Add an option "PrintDataFrame" at [TraceInfo] in PWRVIEWS.INI to
    turn on/off the data frames displaying for Trace in Instruction mode.
    The default is "on".

  Because PowerViews 2.2m has increased in size with the addition of the
  Peripheral window, there is a greater chance of getting a GP fault
  under low Windows resource conditions.  The following tips should
  reduce the chances of getting a GP fault:

  * Be sure that you have enough files and buffers defined in your
    config.sys file.  Minimum should be 30 for each.

  * Be sure you have a minimum swap file of 4 MB (permanent is
    recommended).

  * PV2.2m requires a minimum of 5Mbytes of free memory after Windows is
    loaded.  More memory is better, especially if you run other
    applications at the same time.  If memory is low, close other
    applications to regain memory.

  * While the emulator runs, status messages are sent from the chassis to
    the host PC.  This adds serial communication overhead to your PC.
    If you are running a DOS shell at the same time, give it a low
    priority via the .PIF file settings, or stop the emulator.

  * One GP fault that showed up in PowerViews was actually caused by
    a buggy video device driver of the Diamond Stealth ISA 1M VRAM card
    (version 2.31) in 1024 X 768 mode.  The problem went away when by
    reducing the resolution to 800 X 600.  If this fault occurs, install
    a more current device driver.


  * GP Faults

    If you have received a GP fault, our ability to find and fix it is
    increased if you can run the Dr. Watson recorder, which captures
    information at the point of the GP fault.  The Dr. Watson program is
    shipped with windows and is located in your windows directory.

    To start Windows with Dr. Watson enabled, use the File Manager to
    drag and drop the drwatson.exe icon (in your windows directory) into
    the Windows StartUp Group.  Another way to do this is to add the path
    and filename to the load= line of your win.ini file.  Example:

          load=c:\windows\drwatson.exe

    After a GP fault, the drwatson.log file in your Windows directory holds
    the information.  Fax or e-mail this file, along with any other
    information that led up to the GP fault, to Microtek International.  

         Fax: 886-35-772598.         E-mail: csupport@microtekintl.com

  * PV.DMP

    Under some conditions, an error can occur which produces a message box
    indicating that information about a problem has been placed in the file
    pv.dmp in your PowerViews directory.  This file gets written over each
    time an error occurs, so we recommend that you rename the file, then
    fax or e-mail it to Microtek International.

Part 2: All PowerTools Development Systems

I. System Requirements

The following host computer requirements and recommendations apply:
 1. An Intel 386DX, Intel 486, or Intel Pentium(tm)-based PC or 100%
    compatible system.
 2. 8 Megabytes of RAM
 3. 4.8 Megabytes of available disk space.
 4. VGA or Super VGA graphics card and color monitor
    (a graphics accelerator card will boost performance).
 5. Mouse.
 6. Serial port.
 7. MSDOS 3.3, 5.0, or 6.0
 8. Windows 3.1 running in 386-enhanced mode.
 9. 4 Megabytes or greater swap file (permanent swap file recommended).
10. Minimum: Files=30  Buffers=30


II. Problems

 1. When MMU is enabled, the Linked Cursor Trace functionality might
    perform incorrectly.

 2. The Intermetrics CPU32 toolchain, including the FORM695 translator
    to IEEE-695 symbol format, generates pointer types not currently
    dereferencable by the Variable window.  The result is that when
    these pointers are added to the Variable window, the pointer value
    can be viewed and edited but the pointer cannot be dereferenced.
    A partial work-around is to open a Memory window and go to the
    address of the pointer value.  The value it is pointing to can be
    viewed in a choice of radices.  This problem will be fixed in the
    version after PV2.2m

 3. When a pointer within a union is edited in the Variable window,
    a child variable of that pointer does not update on the screen
    correctly until you delete the child variable and re-select the
    pointer.

 4. Variables declared with the @far attribute in Whitesmiths files
    appear as 'static' objects in the symbol table, even if you do not
    declare them with the 'static' modifier.  This is a workaround for
    invalid debug records generated by the Whitesmiths IEEE-695 translator.

 5. Variables declared inside nested blocks do not appear in the Stack
    window.  You can use the Source window to select them for inspection. 


III. PowerViews Application Notes

 1. For the 68330, 340, and 360, peripheral registers cannot be accessed
    until the MBAR V bit (bit 0) has been set.  This applies to the
    Peripheral window viewing the same registers.  The V bit is also
    cleared after a processor reset; therefore, it may be necessary to
    program the V bit.  For these processors, the MBAR can only be
    accessed from CPU space.  The only method for accessing CPU space
    in PowerViews is using the write command in the Shell window.

    After reseting the processor, the following three commands are required:

         dump 0x3FF00 0x3FF03 long cpu;
         write 0x3FF00 0x400001 long cpu;  
         configcs;

    Some processors require that the base address register be read before it
    is written when it is done from the Background Debug Mode interface.
    This is accomplished with the dump command.

    To enable access to all the peripheral registers and, in this example,
    to set the peripheral base address to 0x400000, the write command shown
    above is required.

    Finally, to initialize the internal PowerViews state, the configcs command
    must be executed.
  
 2. PowerViews can be set up to run an auto-initialization script.  The
    script sets up the emulator to your requirements each time the
    PowerViews software is invoked.  The product is shipped with an
    include file that describes how to do this.  The file is named
    "include.me".  To create your own script file, edit a file with the
    commands you want for initialization.  Be sure to end each command
    with a semicolon.  The contents of an example startup include file
    named c:\pwrviews\reset.inc are:

           map 0 0xffff;      // set up overlay map
           write 0xfffa21 4;  // turn off SW watchdog, enable bus monitor
           restoreCS c:\pwrviews\savedcs.cs;  // restore chip selects

    Edit the pwrviews.ini file (in your windows directory)  Change
    the "script=include.me" line to "script=c:\pwrviews\reset.inc".
    Be sure to include the path.

    You can also run the same include file in the Shell window after you
    have reset the processor by typing

           include "c:\pwrviews\reset.inc";

 3. For a description of C++ debugging support and limitations, see
    Technical Note #2 in \pwrviews\teknotes\teknote.2.

 4. Release 2.0a, 2.1c, 2.2b, 2.2c and 2.2m support the Whitesmiths 68HC16
    compiler version 3.32 mod 10 and the converter to695.exe that converts
    to IEEE-695 output.  The Whitesmiths compiler is sold by Intermetrics.

 5. Check the Compiler Information appendix in the User's Manual or 
    Compiler Support in the Technical Notes section of the on-line help
    for complete details on compiler and converter options, and other
    issues regarding the toolchain you are using.

 6. Debugging code contained in C include files is not supported.
 
 7. The Source window does not support browsing of data-only modules.
    If you have modules that only contain data declarations, define a
    dummy function in it; you can then browse it and add variables
    to the Variable window from it.

 8. After power-up, a hardware reset by the target, or issuing the
    emulator reset command, the 68331/68332/F333/68HC16 software watchdog
    timer is enabled by default (the watchdog timer for the 68340 and 330
    powers up disabled).  You should disable the watchdog timer, or debug
    this part of your code first in order to avoid the reset by the
    watchdog timer.
     
    You can disable the watchdog timer for the 331, 332, 333, HC16 by
    writing 0 to the SWE (Software Watchdog Enable) bit 7 of the
    SYPCR (System Protection Control Register).  Bit 2 of the same
    register enables the internal bus monitor to terminate bus cycles.
    The Shell command to disable the watchdog timer and enable the bus
    monitor is:

        write 0xFFFA21 4;

    NOTE:  This is a write-once register.  To change it again, you must
           first reset the processor.

    You can also use the Peripheral window to change this value.  Expand
    the SIM peripheral, find SYPCR with address FFFA21, double click to
    bring up the edit dialog, click on the SWE (Software Watchdog Enable)
    field, then set it to 0.  To enable the Bus Monitor, click on BME -
    Bus Monitor External Enable, then set it to 1.  To save the changes,
    click on Write, then Close.

    The 68360 powers up with its watchdog timer enabled.  To disable
    it you must clear bit 7 of the SYPCR register - a write-once
    register.  Remember that the MBAR must be initialized first before
    any peripheral register can be accessed.

 9. If you want the software watchdog timer enabled during program
    execution but still want to start and stop the program to debug it,
    you can set the FRZSW (Freeze Software Enable) bit which will turn
    off the watchdog and periodic interrupt timers when the FREEZE signal
    is asserted (and background mode is entered).  Do this by setting
    bit 14 of the MCR Module Control Register - at address 0xFFFA00.

10. If you want to single step the program while all interrupts to the
    processor (internal or external) remain enabled, go to the Toolbar
    and check the Mask Interrupts for Step line in the Configure menu.

    Note: A level-7 interrupt is the highest-level interrupt and 
    cannot be masked.

11. Several operations are available while the target is running if
    runaccess is enabled.  Enable runaccess from the Toolbar Options
    menu or with the Shell command "runaccess on".  To disable target
    access while the target is running, disable runaccess from the
    Toolbar Options menu or issue the Shell command "runaccess off"
    (the initial default).  Memory can be read or written with a small
    amount of processor time taken from the target; a memory read
    reports the current values in target memory or on-chip peripherals.
    However, the CPU registers cannot be accessed during emulation;
    the register display is updated only when emulation halts.  Files
    can be loaded while the emulator is running; you should ensure
    they are loaded at a different location than the program you are
    running.  The PowerPack trace operates independently of the emulator,
    so it can be stopped and started without affecting emulation
    (this is sometimes referred to as logic analyzer mode).

12. If you have a communications port with a 16550 FIFO enabled (used
    by the Windows 3.1 communications driver, if present), rebooting
    without properly closing Windows may result in an inability to
    reestablish communications with the emulator.  Usually, a "Hardware
    is not present" error message is issued.  Usually, the PC BIOS does
    not recognize the port with FIFOs enabled.  You can get around this
    problem by including the default address of the COM port in your
    system.ini file.  Edit the [386Enh] section of system.ini (in your
    Windows directory) to include one of the following addresses
    (corresponding to the COM port you use for communication with the
    PowerPack or PowerScope):

        COM1Base=3f8h
        COM2Base=2f8h
        COM3Base=3e8h
        COM4Base=2e8h

    This change enables Windows to use the specified COM port.

13. When encountering a STOP instruction, the CPU enters the stop
    state.  From the target, only an interrupt or hardware reset
    can wake up the processor.  From the emulator, only a reset
    command can get control; the Halt operation cannot.  If your
    code has a STOP instruction, you may want to replace it with
    a JMP-to-self instruction so that you don't have to reset the
    processor.

14. The Stack window high-water mark feature uses the stack
    base and stack size information contained in your load file.
    If the high-water mark is enabled, the Stack window
    automatically initializes the stack memory to 0xAA55 after
    the load is complete, and it uses this information to detect
    how much of the stack has been used.

    If your load file does not contain initial stack information,
    you can provide the information with the following Shell
    window command:

       setStackArea <baseAddress> <size> fillArea;

    <baseAddress> is the starting stack address, <size> is the stack
    size in bytes, and the optional fillArea switch fills the stack
    memory range with the value 0xAA55 so that the high-water mark can
    be calculated.  You can put this command in your power-up
    initialization include file as described in item 1 above.

15. You can access the Shell command history with Ctrl-uparrow
    and Ctrl-downarrow keys.

IV. PowerViews Limits

 1. PowerViews recognizes only the first 125 characters of a symbol.

 2. The maximum number of source lines per module is 16000.


Part 4:  PowerPack Emulators

 I. Problems

 1. The Trace window Save As... function has a problem when saving
    trace data with certain frame ranges.  When the range is small,
    the amount of lines saved may be zero even though there are more
    than zero lines of bus or instruction trace in this range.  The
    fix is to decrease the start frame value.  It is also possible to
    get more lines of trace data in the file than specified by the
    frame range, due to the method used for accumulating these lines.

II. PowerPack Emulator Application Notes

 1. IMPORTANT: To configure the emulator to match your target chip
    selects, refer to the User's Manual chapter "Debugging Basics"
    and the section "Configuring the Emulator to Match the Target
    Chip Selects", or the on-line help topic Chip Selects under
    Technical Notes.

    IF YOU DO NOT CONFIGURE THE EMULATOR TO MATCH YOUR TARGET
    CHIP SELECTS, THE EMULATOR MAY NOT WORK.

    YOU CAN PUT CHIP SELECT INITIALIZATION COMMANDS INTO AN INCLUDE
    FILE SO THAT THEY ARE AUTOMATICALLY SET UP WHEN POWERVIEWS IS
    STARTED.  Refer to item 1 in the PowerViews Application Notes section
    above.

 2. The PowerPack emulator requires a running CLOCKOUT signal.  Do not
    turn off the CLOCKOUT signal in the MCR (Module Control Register),
    or the emulator will not work and will usually report "Unknown
    Processor Type".  For the 68331, 332, F333, bit 15 of the MCR
    register resets to 0 and should not be changed.

 3. Show cycles (e.g., internal register/memory transfers) can be
    collected in the Trace buffer only after they are enabled.
    To enable show cycles, select the Toolbar's Configure/Show Cycles
    menu command.

    For the 68340, 330, and 360, the Valid bit must be set in the
    Module Base Address Register before the show cycles enable bit
    can be programmed.

 4. For the 68330 and 68340, A31-A24 are user-selectable as address lines,
    Port A input/outputs, or as interrupt acknowledge inputs.  The PowerPack
    probe regenerates these upper addresses based on programmed chip
    selects (after running configCS), which are then passed to the
    trigger/trace system.  This means that even if Port A is not defined
    to output the upper addresses, they are valid in the trigger and trace.

    Some target 330/340 designs do not use any chip selects.  For this case,
    after running configCS, the upper addresses are pre-set to 0's.  When
    defining a address event, leave the upper 2 hex digits of the 8
    digit address as 0's and the address will be recognized correctly.

 5. When using a null target board (stand-alone operation) with the
    68332, 68331, or 68HC16, do not reprogram the functions of the
    pins CS0/BR, CS1/BG or CS2/BGACK - they should remain programmed
    to the Chip Select function.  When running PowerViews on a user
    target, these pins can be programmed in any way. 

 6. When using a null target board, attempts to write to non-existent
    memory do not always report memory-verify errors.  The data bus
    pins on the null target board are not connected and the data
    from the write stays long enough to read back correctly.  This
    is not a problem in a target where the data bus is terminated.


III. PowerPack Emulator Limits

 1. The minimum target processor clock rate supported is 131kHz.


Part 5: PowerScope Hardware-Assisted Debugger

I. PowerScope Debugger Application Notes

 1. For PowerScope 68360, there are some restrictions on breakpoints
    when using the 360 internal hardware breakpoint.  If you want to
    use the internal hardware breakpoint, you must not set any other
    breakpoints that are in read-only memory.  Here's why.
    The PowerScope supports 4 pseudo-hardware breakpoints.  These are
    set automatically whenever a breakpoint is programmed and a BKPT
    instruction cannot be placed at the address specified.  This occurs
    if the code is in EPROM or if a chip select is set as read-only.
    When this type of breakpoint is set, PowerScope single steps the
    processor looking for a match between the current PC and one of
    the breakpoints.  In this mode, the internal hardware breakpoint
    will not be observed because the processor is being single stepped.


II. PowerScope Hardware-Assisted Debugger Limits

 1. The minimum target processor clock rate supported is 131kHz.
