PALASM 4 v1.5 MACH FITR - MARKET RELEASE (7-24-92)
 (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1990,91,92

 
Reading User Design (TRE File)...
 
Reading Device Database ...

******************************************************************************
     Mach PLD Fitter - v 1.67          THE MEMORY MAP CONTROL FOR MICHELLE
******************************************************************************

PAIR Analysis...

Pre-Placement & Equation Usage Checks... 
 
|> WARNING F210 - Design contains both floating & fixed placements.  





*** Timing Analysis for Signals

 Parameter   Min   Max           Signal List (Those having Max delay.)
      Tpd     1     4              NEN8B         NENEMBL         NENEMBH 
                                    NWE1            NWE0 
      Tsu     1     4             NGUFLG        _7_X27_Q       DISRDONLY 
                               MAPCOVSEL        _2_NPMAP      _2_NFOEMAP 
      Tco     0     4              NEN8B         NENEMBL         NENEMBH 
                                    NWE1            NWE0 
      Tcr     2     4             NGUFLG        _7_X27_Q 
.

 Key:
 Tpd - Combinatorial propagation delay, input to output
 Tsu - Combinatorial setup delay before clock
 Tco - clock to output (register output to combinatorial output)
 Tcr - Clock to register setup delay
.......(Register output thru combinatorial logic to reg input)
 All delay values are expressed in terms of array passes




*** Device Resource Checks

                Available        Used        Remaining
        Clocks:     4              2              2
          Pins:    70             63              7     ->    90%
     I/O Macro:    64             38             26
   Total Macro:    64             51             13
 Product Terms:   256            115             20     ->    92%
 
MACH-PLD Resource Checks OK!  



Partitioning Design into Blocks...

|> ERROR F740 - Resource violation in preplacement: (Product Terms) - Block A


|> ERROR F740 - Resource violation in preplacement: (IO Pins) - Block A


*** Last Equations Placed in Blocks

Weakly -       _7_M167_2       _7_TTSEL8        _7_X27_Q          NGUFLG 
Assign -        _3_MODE1        _3_MODE0         NENVIOL       DISRDONLY |> INFORMATION F085 - Intermediate Error Count: 2, Warning Count: 1
|> INFORMATION F075 - Redo Partitioning with Max Packing Flag=True 

*** Last Equations Placed in Blocks

Weakly -       _7_TTSEL8        _7_X27_Q          NGUFLG        _3_MODE1 
Assign -        _3_MODE0         NENVIOL       DISRDONLY       MAPCOVSEL 


|> INFORMATION F050 - Device Utilization.............. *: 88 %



*** Block Partitioning Results

               Array   Product     # I/O    Buried    Signal    Macros
              Inputs    Terms      Macro     Logic    Fanout    Remain
   Block-> A    14        64*       11         1         4         4
   Block-> B    24        64*        9         3         7         4
   Block-> C    26*       64*       10         6        22         0
   Block-> D    23        44         8         3        22         5



*** Block Signal List

Blk-> A       _7_X27_Q  3            MD8  2       _7_X40_I  0            MD0  1
                CEMA17  2         NEN2M3  9         NEN2M2  9         NEN2M1  9
                NEN2M0  9         NEN1M1  9         NEN1M0  9       NEN512K1  9
              NEN512K0  9

Blk-> B      MAPCOVSEL  1      _7_M167_2  4      _7_M163_2  4            DIR  4
                 NEN8B 10        NENEMBL  9        NENEMBH 10       NVIOLBRK  3
                  NWE1 11         NEMRD0  1     _7_M154_Y1  4         NEMRD1  4
                  NWE0 11

Blk-> C       _2_NPMAP  1     _2_NFOEMAP  1      DISRDONLY  1        NENVIOL  1
              _3_MODE0  1       _3_MODE1  1        NPRVIOL  2           CPD4  8
                  CPD3 10           CPD2 10           CPD1 10           CPD0 10
               NFCEMAP  1         NOEMAP  4         NCSMAP  2       _2_M90_I  3
                NWEMAP  3

Blk-> D         NGUFLG  5      _7_TTSEL8  2       _2_RDSGN  6         NBSEL1  2
                NBSEL0  2        NRDONLY  2          NENEM  2       _2_M69_2  0
                  CPD7  1           CPD6  8           CPD5  7        IOLATCH  2



*** Block Input List

Blk-> A           EA16  8           EA17  9           EA18  8           EA19  8
                  EA20  8           NEWE  1         NMEMRQ  1        NRDONLY  1
                N1MVLD  8        N2MVLD0  8        N2MVLD1  8         NMAX8M  9
              _7_X40_I  1      MAPCOVSEL  2

Singular:           NEWE{       _7_X27_Q}         NMEMRQ{       _7_X27_Q}
                 NRDONLY{       _7_X27_Q}       _7_X40_I{            MD8}
         

Blk-> B           NEWE  6           NERD  6        NBPBUS1  3        NBPBUS0  3
                NMEMRQ  5           SEL8  1           CPS8  3           CPS9  1
                  CPD2  1         NMBEN1  3         NMBEN0  2          NENEM  5
               NRDONLY  2     _7_M154_Y1  1      MAPCOVSEL  4      DISRDONLY  2
               NENVIOL  1       _3_MODE0  9       _3_MODE1  9         NGUFLG  1
              _7_X27_Q  1      _7_TTSEL8  1      _7_M163_2  1      _7_M167_2  1
       

Singular:           SEL8{        NENEMBH}           CPS9{         NEMRD1}
                    CPD2{      MAPCOVSEL}     _7_M154_Y1{         NEMRD0}
                 NENVIOL{       NVIOLBRK}         NGUFLG{       NVIOLBRK}
                _7_X27_Q{       NVIOLBRK}      _7_TTSEL8{          NEN8B}
               _7_M163_2{           NWE1}      _7_M167_2{           NWE0}
         

Blk-> C         NMCS2L  8         NCPCS8  5           CPS8  1           CPS9  6
                  CPD0  1           CPD1  1           CPD3  1           CPD4  1
                  CPD5  1           CPD6  1           CPD7  1          NENEM  1
               NRDONLY  1         NBSEL0  1         NBSEL1  1         N1MVLD  1
               N2MVLD0  1        N2MVLD1  1       _2_M69_2  5       _2_NPMAP  7
            _2_NFOEMAP  1       _3_MODE0  6       _3_MODE1  6       _2_RDSGN  5
                NGUFLG  1       _7_X27_Q  1

Singular:           CPS8{         NWEMAP}           CPD0{       _2_NPMAP}
                    CPD1{     _2_NFOEMAP}           CPD3{      DISRDONLY}
                    CPD4{        NFCEMAP}           CPD5{        NENVIOL}
                    CPD6{       _3_MODE0}           CPD7{       _3_MODE1}
                   NENEM{           CPD3}        NRDONLY{           CPD2}
                  NBSEL0{           CPD0}         NBSEL1{           CPD1}
                  N1MVLD{           CPD2}        N2MVLD0{           CPD3}
                 N2MVLD1{           CPD4}     _2_NFOEMAP{         NOEMAP}
                  NGUFLG{           CPD1}       _7_X27_Q{           CPD0}
         

Blk-> D        NSTROBE  1         NMEMRQ  1           SEL8  1         NMCS2L  3
                NCPCS8  4           CPS8  1           CPS9  3           CPD0  1
                  CPD1  1           CPD2  1           CPD3  1          NENEM  1
                NBSEL0  1         NBSEL1  1       N512KVLD  1         NMAX8M  1
              _2_M90_I  4       _2_M69_2  1       _2_NPMAP  1      MAPCOVSEL  1
              _3_MODE0  3       _3_MODE1  3       _2_RDSGN  3

Singular:        NSTROBE{         NGUFLG}         NMEMRQ{         NGUFLG}
                    SEL8{      _7_TTSEL8}           CPS8{        IOLATCH}
                    CPD0{         NBSEL0}           CPD1{         NBSEL1}
                    CPD2{        NRDONLY}           CPD3{          NENEM}
                   NENEM{         NGUFLG}         NBSEL0{         NGUFLG}
                  NBSEL1{         NGUFLG}       N512KVLD{           CPD6}
                  NMAX8M{           CPD5}       _2_M69_2{           CPD6}
                _2_NPMAP{       _2_RDSGN}      MAPCOVSEL{      _7_TTSEL8}
         

|> INFORMATION F070 - Multiple Assignment Mode - Repeat Count: 4
Assigning Resources...


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=False         Expand All=False



*** Macro Block C

           CPD0 (C 10) -> (C  2) (D  2)
           CPD1 (C 11) -> (C  3) (D  3)
           CPD2 (C 12) -> (B  4) (D  4)
           CPD3 (C 13) -> (C  5) (D  5)
           CPD4 (C 14) -> (C  6)
       _2_M90_I (C  0) -> (D  8)
         NCSMAP (C  1)
         NOEMAP (C  2)
        NPRVIOL (C 15)
        NFCEMAP (C  3)

 Buried Logic>      _2_NFOEMAP       DISRDONLY         NENVIOL        _3_MODE0
                      _3_MODE1        _2_NPMAP
      Targets>   4(49)   5(50)   6(51)   7(52)   8(54)   9(55)

     _2_NFOEMAP (C  4) -> (C  0)
      DISRDONLY (C  5) -> (B  1)
        NENVIOL (C  6) -> (B  2)
       _3_MODE0 (C  7) -> (B  3) (C 15) (D 15)
       _3_MODE1 (C  8) -> (B 22) (C  4) (D 22)
       _2_NPMAP (C  9) -> (C  8) (D 23)



*** Macro Block D

           CPD7 (D 12) -> (C 11) (C 20) (D  0)
           CPD6 (D 13) -> (C 12)
           CPD5 (D 14) -> (C 13)
         NBSEL1 (D  4) -> (C 10) (D 10)
         NBSEL0 (D  5) -> (C 19) (D 11)
        NRDONLY (D  6)?
          NENEM (D  7) -> (B  7) (C  7) (D  7)
        NRDONLY (D  6) -> (A  6) (B  6)   Blocked -> Reshuffling SwMtrx
           CPD1 -> (C 25)    Moved. -> Reshuffling SwMtrx
       _3_MODE0 -> (C  3)    Moved. -> Reshuffling SwMtrx
       _3_MODE1 -> (C 15)    Moved. -> Reshuffling SwMtrx
           CPD7 -> (C  4)    Moved. -> Reshuffling SwMtrx
           CPD3 -> (C 11)    Moved. -> Reshuffling SwMtrx
           CPD6 -> (C  5)    Moved. -> Reshuffling SwMtrx
           CPD4 -> (C 12)    Moved.
        NRDONLY -> (C  6)
        IOLATCH (D 15)

 Buried Logic>       _7_TTSEL8          NGUFLG        _2_RDSGN
      Targets>   0(82)   1(81)   2(80)   3(79)   8(73)   9(72)  10(71)  11(70)
              

     * Retry Mapping
     * Retry Mapping
      _7_TTSEL8 (D  0) -> (B  8)
       _2_RDSGN (D  2) -> (C 17) (D  6)
         NGUFLG (D 10) -> (B  9) (C  9)



*** Macro Block Inputs

        NSTROBE (I  0) -> (D  9)
           SEL8 (I  2) -> (B 16) (D 16)
         NMAX8M (I  5)?
         NMAX8M (I  5) -> (A  4)   Blocked -> Reshuffling SwMtrx
         NBSEL1 -> (D 18)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (D 10)    Moved.
         NMAX8M -> (D  4)



*** Macro Block B

     _7_M154_Y1 (B 13) -> (B 13)
          NEN8B (B  2)
        NENEMBL (B  3)
           NWE1 (B  7)
           NWE0 (B 14)
            DIR (B  1)
        NENEMBH (B  4)
       NVIOLBRK (B  5)
         NEMRD0 (B 12)

 Buried Logic>       MAPCOVSEL       _7_M163_2       _7_M167_2
      Targets>   8(31)  10(29)  11(28)

      _7_M163_2 (B  8) -> (B 23)
      MAPCOVSEL (B 10) -> (A 10) (B 10) (D 17)
      _7_M167_2 (B 11) -> (B 11)



*** Macro Block A

       _7_X40_I (A 14) -> (A  2)
            MD8 (A 15)
       NEN512K0 (A  0)
       NEN512K1 (A  2)
         NEN1M0 (A  4)
         NEN1M1 (A  6)
         NEN2M0 (A  8)
         NEN2M1 (A  9)
         NEN2M2 (A 10)
         NEN2M3 (A 11)
         CEMA17 (A 13)

 Buried Logic>        _7_X27_Q
      Targets>  12(16)

       _7_X27_Q (A 12)? 
       _7_X27_Q (A 12) -> (B  0)   Blocked -> Reshuffling SwMtrx
           CPD7 -> (C 18)    Moved. -> Reshuffling SwMtrx
         NBSEL1 -> (C  4)    Moved. -> Reshuffling SwMtrx
       _2_RDSGN -> (C 10)    Moved. -> Reshuffling SwMtrx
     _2_NFOEMAP -> (C 17)    Moved.
       _7_X27_Q -> (C  0)

        N2MVLD1 (D  0) -> (A  0) (C 16)
         NMEMRQ (B  0) -> (A 25) (B 25) (D 25)
        N2MVLD0 (D  1) -> (A  1) (C  1)
           EA16 (A  1) -> (A  9)
         N1MVLD (D  2)?
       N512KVLD (D  3)?
           EA17 (A  3) -> (A  3)
           EA18 (A  5) -> (A  5)
         NMCS2L (C  6)?
         NCPCS8 (C  7)?
           EA19 (A  7) -> (A  7)
         NMBEN0 (D  8) -> (B 15)
           CPS8 (C  8) -> (B 14) (C 14) (D 14)
        NBPBUS0 (B  8) -> (B 17)
         NMBEN1 (D  9)?
           CPS9 (C  9)?
        NBPBUS1 (B  9)?
           NERD (B 10) -> (B 18)
           NEWE (B 11) -> (A 12) (B  5)
           EA20 (A 12) -> (A 11)
         N1MVLD (D  2) -> (A  8) (C 24)
       N512KVLD (D  3) ->   Blocked -> Reshuffling SwMtrx
         NBSEL0 -> (D 19)    Moved. -> Reshuffling SwMtrx
           CPD3 -> (D 11)    Moved. -> Reshuffling SwMtrx
         NMAX8M -> (D  5)    Moved. -> Reshuffling SwMtrx
       _2_M90_I -> (D  4)    Moved. -> Reshuffling SwMtrx
        NSTROBE -> (D  8)    Moved. -> Reshuffling SwMtrx
           CPD1 -> (D  9)    Moved.
       N512KVLD -> (D  3)
         NMCS2L (C  6) -> (C 22)   Blocked -> Reshuffling SwMtrx
          NENEM -> (D 21)    Moved. -> Reshuffling SwMtrx
         NMAX8M -> (D  7)    Moved. -> Reshuffling SwMtrx
           CPD3 -> (D  5)    Moved. -> Reshuffling SwMtrx
       _2_M69_2 -> (D 11)    Moved. -> Reshuffling SwMtrx
         NMEMRQ -> (D  0)    Moved. -> Reshuffling SwMtrx
       N512KVLD -> (D 25)    Moved. -> Reshuffling SwMtrx
           CPD1 -> (D  3)    Moved. -> Reshuffling SwMtrx
        NSTROBE -> (D  9)    Moved. -> Reshuffling SwMtrx
       _2_M90_I -> (D  8)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (D  4)    Moved. -> Reshuffling SwMtrx
       _2_RDSGN -> (D 10)    Moved.
         NMCS2L -> (D  6)
         NCPCS8 (C  7) -> (C 23)   Blocked -> Reshuffling SwMtrx
       _2_M69_2 -> (D 20)    Moved. -> Reshuffling SwMtrx
           CPD3 -> (D 11)    Moved. -> Reshuffling SwMtrx
       _2_NPMAP -> (D  5)    Moved. -> Reshuffling SwMtrx
       _2_M90_I -> (D 23)    Moved. -> Reshuffling SwMtrx
        NSTROBE -> (D  8)    Moved. -> Reshuffling SwMtrx
           CPD1 -> (D  9)    Moved. -> Reshuffling SwMtrx
       _3_MODE0 -> (D  3)    Moved. -> Reshuffling SwMtrx
         NMCS2L -> (D 15)    Moved. -> Reshuffling SwMtrx
       _2_RDSGN -> (D  6)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (D 10)    Moved. -> Reshuffling SwMtrx
         NMAX8M -> (D  4)    Moved.
         NCPCS8 -> (D  7)
         NMBEN1 (D  9) ->   Blocked -> Reshuffling SwMtrx
     _7_M154_Y1 -> (B 20)    Moved. -> Reshuffling SwMtrx
      DISRDONLY -> (B 13)    Moved.
         NMBEN1 -> (B  1)
           CPS9 (C  9) ->   Blocked -> Reshuffling SwMtrx
        NBPBUS0 -> (B 24)    Moved. -> Reshuffling SwMtrx
      MAPCOVSEL -> (B 17)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (B 10)    Moved. -> Reshuffling SwMtrx
      _7_TTSEL8 -> (B  4)    Moved. -> Reshuffling SwMtrx
         NMBEN1 -> (B  8)    Moved.
           CPS9 -> (B  1)   Blocked -> Reshuffling SwMtrx
          NENEM -> (C 21)    Moved. -> Reshuffling SwMtrx
         NCPCS8 -> (C  7)    Moved. -> Reshuffling SwMtrx
        N2MVLD0 -> (C 23)    Moved.
           CPS9 -> (C  1) (D  1)
        NBPBUS1 (B  9) ->   Blocked -> No Reshuffle Possible

|> ERROR F595 - Connection not available for User Preplacement - NBPBUS1






Wiring Completion:   98% -> (  1 nc)

*** Physical Signal Placements

       NEN512K0  (A  0)            EA16  (A  1)        NEN512K1  (A  2) 
           EA17  (A  3)          NEN1M0  (A  4)            EA18  (A  5) 
         NEN1M1  (A  6)            EA19  (A  7)          NEN2M0  (A  8) 
         NEN2M1  (A  9)          NEN2M2  (A 10)          NEN2M3  (A 11) 
           EA20  (A 12)          CEMA17  (A 13)             MD0  (A 14) 
            MD8  (A 15)         NSTROBE  (I  0)            NWE0  (B 14) 
         NEMRD1  (B 13)          NEMRD0  (B 12)            NEWE  (B 11) 
           NERD  (B 10)         NBPBUS1  (B  9)         NBPBUS0  (B  8) 
           NWE1  (B  7)        NVIOLBRK  (B  5)         NENEMBH  (B  4) 
        NENEMBL  (B  3)           NEN8B  (B  2)             DIR  (B  1) 
         NMEMRQ  (B  0)            SEL8  (I  2)          NWEMAP  (C  0) 
         NCSMAP  (C  1)          NOEMAP  (C  2)         NFCEMAP  (C  3) 
         NMCS2L  (C  6)          NCPCS8  (C  7)            CPS8  (C  8) 
           CPS9  (C  9)            CPD0  (C 10)            CPD1  (C 11) 
           CPD2  (C 12)            CPD3  (C 13)            CPD4  (C 14) 
        NPRVIOL  (C 15)          NPRCLK  (I  3)           IOCLK  (I  4) 
        IOLATCH  (D 15)            CPD5  (D 14)            CPD6  (D 13) 
           CPD7  (D 12)          NMBEN1  (D  9)          NMBEN0  (D  8) 
          NENEM  (D  7)         NRDONLY  (D  6)          NBSEL0  (D  5) 
         NBSEL1  (D  4)        N512KVLD  (D  3)          N1MVLD  (D  2) 
        N2MVLD0  (D  1)         N2MVLD1  (D  0)          NMAX8M  (I  5) 
       _7_X40_I  (A 14)         __AB6_O  (A 15)         __AB5_O  (B 12) 
     _7_M154_Y1  (B 13)        _2_M90_I  (C  0)       _2_M140_O  (C 10) 
      _2_M145_O  (C 11)       _2_M146_O  (C 12)       _2_M147_O  (C 13) 
      _2_M149_O  (C 14)         __AB2_O  (D  4)         __AB1_O  (D  5) 
        __AB3_O  (D  6)         __AB4_O  (D  7)        _2_M69_2  (D 12) 
      _2_M151_O  (D 13)       _2_M150_O  (D 14)        _2_NPMAP  (C  9) 
     _2_NFOEMAP  (C  4)       MAPCOVSEL  (B 10)       DISRDONLY  (C  5) 
        NENVIOL  (C  6)        _3_MODE0  (C  7)        _3_MODE1  (C  8) 
       _2_RDSGN  (D  2)          NGUFLG  (D 10)        _7_X27_Q  (A 12) 
      _7_TTSEL8  (D  0)       _7_M163_2  (B  8)       _7_M167_2  (B 11) 
Assigning Resources...
|> INFORMATION F085 - Intermediate Error Count: 1, Warning Count: 1


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=True          Expand All=False



*** Macro Block C

           CPD0 (C 10) -> (C  2) (D  2)
           CPD1 (C 11) -> (C  3) (D  3)
           CPD2 (C 12) -> (B  4) (D  4)
           CPD3 (C 13) -> (C  5) (D  5)
           CPD4 (C 14) -> (C  6)
       _2_M90_I (C  0) -> (D  8)
         NCSMAP (C  1)
         NOEMAP (C  2)
        NPRVIOL (C 15)
        NFCEMAP (C  3)

 Buried Logic>        _2_NPMAP      _2_NFOEMAP       DISRDONLY
      Targets>   4(49)   6(51)   8(54)

       _2_NPMAP (C  4) -> (C  0) (D  0)
     _2_NFOEMAP (C  6) -> (C 14)
      DISRDONLY (C  8) -> (B 15)

 Buried Logic>         NENVIOL        _3_MODE0        _3_MODE1
      Targets>   5(50)   7(52)   9(55)

        NENVIOL (C  5) -> (B  1)
       _3_MODE0 (C  7) -> (B  3) (C 15) (D 15)
       _3_MODE1 (C  9) -> (B  5) (C  8) (D 23)



*** Macro Block D

           CPD7 (D 12) -> (C  4) (C 11) (D 11)
           CPD6 (D 13) -> (C 12)
           CPD5 (D 14) -> (C 13)
         NBSEL1 (D  4) -> (C 10) (D 10)
         NBSEL0 (D  5) -> (C 19) (D 19)
        NRDONLY (D  6) -> (A  6) (B  6) (C 20)
          NENEM (D  7) -> (B  7) (C  7) (D  7)
        IOLATCH (D 15)

 Buried Logic>          NGUFLG       _7_TTSEL8        _2_RDSGN
      Targets>   0(82)   2(80)   8(73)  10(71)

      _7_TTSEL8 (D  0) -> (B  8)
         NGUFLG (D  2) -> (B 10) (C 17)
       _2_RDSGN (D  8) -> (C 16) (D 16)



*** Macro Block Inputs

        NSTROBE (I  0) -> (D  9)
           SEL8 (I  2) -> (B  2) (D 17)
         NMAX8M (I  5) -> (A  4) (D  6)



*** Macro Block B

     _7_M154_Y1 (B 13) -> (B 13)
          NEN8B (B  2)
        NENEMBL (B  3)
           NWE1 (B  7)
           NWE0 (B 14)
            DIR (B  1)
        NENEMBH (B  4)
       NVIOLBRK (B  5)
         NEMRD0 (B 12)

 Buried Logic>       MAPCOVSEL       _7_M167_2
      Targets>   8(31)  11(28)

      _7_M167_2 (B  8) -> (B 23)
      MAPCOVSEL (B 11) -> (A 11) (B 11) (D 18)

 Buried Logic>       _7_M163_2
      Targets>   9(30)

      _7_M163_2 (B  9) -> (B  9)



*** Macro Block A

       _7_X40_I (A 14) -> (A  2)
            MD8 (A 15)
       NEN512K0 (A  0)
       NEN512K1 (A  2)
         NEN1M0 (A  4)
         NEN1M1 (A  6)
         NEN2M0 (A  8)
         NEN2M1 (A  9)
         NEN2M2 (A 10)
         NEN2M3 (A 11)
         CEMA17 (A 13)

 Buried Logic>        _7_X27_Q
      Targets>  12(16)

       _7_X27_Q (A 12)? 
       _7_X27_Q (A 12) -> (B  0)   Blocked -> Reshuffling SwMtrx
           CPD7 -> (C 18)    Moved. -> Reshuffling SwMtrx
         NBSEL1 -> (C  4)    Moved. -> Reshuffling SwMtrx
         NGUFLG -> (C 10)    Moved. -> Reshuffling SwMtrx
       _2_NPMAP -> (C 17)    Moved.
       _7_X27_Q -> (C  0)

        N2MVLD1 (D  0)?
         NMEMRQ (B  0) -> (A  0) (B 25) (D 25)
        N2MVLD0 (D  1) -> (A  1) (C  1)
           EA16 (A  1) -> (A  9)
         N1MVLD (D  2)?
       N512KVLD (D  3)?
           EA17 (A  3) -> (A  3)
           EA18 (A  5) -> (A  5)
         NMCS2L (C  6) -> (C 22) (D 22)
         NCPCS8 (C  7)?
           EA19 (A  7) -> (A  7)
         NMBEN0 (D  8) -> (B 22)
           CPS8 (C  8)?
        NBPBUS0 (B  8) -> (B 17)
         NMBEN1 (D  9)?
           CPS9 (C  9)?
        NBPBUS1 (B  9)?
           NERD (B 10) -> (B 18)
           NEWE (B 11) -> (A 12) (B 12)
           EA20 (A 12) -> (A 22)
        N2MVLD1 (D  0) -> (A 16)   Blocked -> No Reshuffle Possible


|> ERROR F595 - Connection not available for User Preplacement - N2MVLD1

         N1MVLD (D  2) -> (A  8) (C 24)
       N512KVLD (D  3) ->   Blocked -> Reshuffling SwMtrx
          NENEM -> (D 21)    Moved. -> Reshuffling SwMtrx
         NMAX8M -> (D  7)    Moved. -> Reshuffling SwMtrx
         NMCS2L -> (D  6)    Moved. -> Reshuffling SwMtrx
       _3_MODE0 -> (D 22)    Moved. -> Reshuffling SwMtrx
       _2_RDSGN -> (D 15)    Moved. -> Reshuffling SwMtrx
           CPD0 -> (D 16)    Moved. -> Reshuffling SwMtrx
           SEL8 -> (D  2)    Moved. -> Reshuffling SwMtrx
       _2_NPMAP -> (D 17)    Moved. -> Reshuffling SwMtrx
       _2_M69_2 -> (D  0)    Moved. -> Reshuffling SwMtrx
      MAPCOVSEL -> (D 11)    Moved. -> Reshuffling SwMtrx
         NBSEL1 -> (D 18)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (D 10)    Moved. -> Reshuffling SwMtrx
       _2_M90_I -> (D  4)    Moved. -> Reshuffling SwMtrx
        NSTROBE -> (D  8)    Moved. -> Reshuffling SwMtrx
           CPD1 -> (D  9)    Moved.
       N512KVLD -> (D  3)
         NCPCS8 (C  7) -> (C 23)   Blocked -> Reshuffling SwMtrx
       _2_M69_2 -> (D 20)    Moved. -> Reshuffling SwMtrx
         NMEMRQ -> (D  0)    Moved. -> Reshuffling SwMtrx
       N512KVLD -> (D 25)    Moved. -> Reshuffling SwMtrx
           CPD1 -> (D  3)    Moved. -> Reshuffling SwMtrx
        NSTROBE -> (D  9)    Moved. -> Reshuffling SwMtrx
       _2_M90_I -> (D  8)    Moved. -> Reshuffling SwMtrx
         NMAX8M -> (D  4)    Moved.
         NCPCS8 -> (D  7)
           CPS8 (C  8) -> (B 14)   Blocked -> No Reshuffle Possible
 (D 14)

|> ERROR F595 - Connection not available for User Preplacement - CPS8

         NMBEN1 (D  9) ->   Blocked -> Reshuffling SwMtrx
     _7_M154_Y1 -> (B 20)    Moved. -> Reshuffling SwMtrx
        NENVIOL -> (B 13)    Moved.
         NMBEN1 -> (B  1)
           CPS9 (C  9) ->   Blocked -> Reshuffling SwMtrx
       _3_MODE1 -> (B 24)    Moved. -> Reshuffling SwMtrx
           NEWE -> (B  5)    Moved. -> Reshuffling SwMtrx
        NRDONLY -> (B 12)    Moved. -> Reshuffling SwMtrx
         NGUFLG -> (B  6)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (B 10)    Moved. -> Reshuffling SwMtrx
      _7_TTSEL8 -> (B  4)    Moved. -> Reshuffling SwMtrx
         NMBEN1 -> (B  8)    Moved.
           CPS9 -> (B  1)   Blocked -> Reshuffling SwMtrx
          NENEM -> (C 21)    Moved. -> Reshuffling SwMtrx
         NCPCS8 -> (C  7)    Moved. -> Reshuffling SwMtrx
        N2MVLD0 -> (C 23)    Moved.
           CPS9 -> (C  1) (D  1)
        NBPBUS1 (B  9) ->   Blocked -> Reshuffling SwMtrx
           NEWE -> (B 19)    Moved. -> Reshuffling SwMtrx
       _3_MODE1 -> (B  5)    Moved. -> Reshuffling SwMtrx
        NBPBUS0 -> (B 24)    Moved. -> Reshuffling SwMtrx
       _7_X27_Q -> (B 17)    Moved. -> Reshuffling SwMtrx
         NMEMRQ -> (B  0)    Moved. -> Reshuffling SwMtrx
      _7_TTSEL8 -> (B 25)    Moved. -> Reshuffling SwMtrx
      DISRDONLY -> (B  4)    Moved. -> Reshuffling SwMtrx
           CPS9 -> (B 15)    Moved.
        NBPBUS1 -> (B  1)





Wiring Completion:   96% -> (  5 nc)

*** Physical Signal Placements

       NEN512K0  (A  0)            EA16  (A  1)        NEN512K1  (A  2) 
           EA17  (A  3)          NEN1M0  (A  4)            EA18  (A  5) 
         NEN1M1  (A  6)            EA19  (A  7)          NEN2M0  (A  8) 
         NEN2M1  (A  9)          NEN2M2  (A 10)          NEN2M3  (A 11) 
           EA20  (A 12)          CEMA17  (A 13)             MD0  (A 14) 
            MD8  (A 15)         NSTROBE  (I  0)            NWE0  (B 14) 
         NEMRD1  (B 13)          NEMRD0  (B 12)            NEWE  (B 11) 
           NERD  (B 10)         NBPBUS1  (B  9)         NBPBUS0  (B  8) 
           NWE1  (B  7)        NVIOLBRK  (B  5)         NENEMBH  (B  4) 
        NENEMBL  (B  3)           NEN8B  (B  2)             DIR  (B  1) 
         NMEMRQ  (B  0)            SEL8  (I  2)          NWEMAP  (C  0) 
         NCSMAP  (C  1)          NOEMAP  (C  2)         NFCEMAP  (C  3) 
         NMCS2L  (C  6)          NCPCS8  (C  7)            CPS8  (C  8) 
           CPS9  (C  9)            CPD0  (C 10)            CPD1  (C 11) 
           CPD2  (C 12)            CPD3  (C 13)            CPD4  (C 14) 
        NPRVIOL  (C 15)          NPRCLK  (I  3)           IOCLK  (I  4) 
        IOLATCH  (D 15)            CPD5  (D 14)            CPD6  (D 13) 
           CPD7  (D 12)          NMBEN1  (D  9)          NMBEN0  (D  8) 
          NENEM  (D  7)         NRDONLY  (D  6)          NBSEL0  (D  5) 
         NBSEL1  (D  4)        N512KVLD  (D  3)          N1MVLD  (D  2) 
        N2MVLD0  (D  1)         N2MVLD1  (D  0)          NMAX8M  (I  5) 
       _7_X40_I  (A 14)         __AB6_O  (A 15)         __AB5_O  (B 12) 
     _7_M154_Y1  (B 13)        _2_M90_I  (C  0)       _2_M140_O  (C 10) 
      _2_M145_O  (C 11)       _2_M146_O  (C 12)       _2_M147_O  (C 13) 
      _2_M149_O  (C 14)         __AB2_O  (D  4)         __AB1_O  (D  5) 
        __AB3_O  (D  6)         __AB4_O  (D  7)        _2_M69_2  (D 12) 
      _2_M151_O  (D 13)       _2_M150_O  (D 14)        _2_NPMAP  (C  4) 
     _2_NFOEMAP  (C  6)       MAPCOVSEL  (B 11)       DISRDONLY  (C  8) 
        NENVIOL  (C  5)        _3_MODE0  (C  7)        _3_MODE1  (C  9) 
       _2_RDSGN  (D  8)          NGUFLG  (D  2)        _7_X27_Q  (A 12) 
      _7_TTSEL8  (D  0)       _7_M163_2  (B  9)       _7_M167_2  (B  8) 
Assigning Resources...
|> INFORMATION F085 - Intermediate Error Count: 2, Warning Count: 1


Flags Used:             Unplace=False        Max Packing=True 
Flags Used:        Expand Small=False         Expand All=True 



*** Macro Block C

           CPD0 (C 10) -> (C  2) (D  2)
           CPD1 (C 11) -> (C  3) (D  3)
           CPD2 (C 12) -> (B  4) (D  4)
           CPD3 (C 13) -> (C  5) (D  5)
           CPD4 (C 14) -> (C  6)
       _2_M90_I (C  0) -> (D  8)
         NCSMAP (C  1)
         NOEMAP (C  2)
        NPRVIOL (C 15)
        NFCEMAP (C  3)

 Buried Logic>        _2_NPMAP      _2_NFOEMAP
      Targets>   4(49)   9(55)

       _2_NPMAP (C  4) -> (C  0) (D  0)
     _2_NFOEMAP (C  9) -> (C  8)

 Buried Logic>       DISRDONLY
      Targets>   5(50)

      DISRDONLY (C  5) -> (B  1)

 Buried Logic>         NENVIOL
      Targets>   6(51)

        NENVIOL (C  6) -> (B  2)

 Buried Logic>        _3_MODE0
      Targets>   7(52)

       _3_MODE0 (C  7) -> (B  3) (C 15) (D 15)

 Buried Logic>        _3_MODE1
      Targets>   8(54)

       _3_MODE1 (C  8) -> (B 15) (C  4) (D 22)



*** Macro Block D

           CPD7 (D 12) -> (C 11) (C 20) (D 11)
           CPD6 (D 13) -> (C 12)
           CPD5 (D 14) -> (C 13)
         NBSEL1 (D  4) -> (C 10) (D 10)
         NBSEL0 (D  5) -> (C 19) (D 19)
        NRDONLY (D  6)?
          NENEM (D  7) -> (B  7) (C  7) (D  7)
        NRDONLY (D  6) -> (A  6) (B  6)   Blocked -> Reshuffling SwMtrx
           CPD1 -> (C 25)    Moved. -> Reshuffling SwMtrx
       _3_MODE0 -> (C  3)    Moved. -> Reshuffling SwMtrx
       _3_MODE1 -> (C 15)    Moved. -> Reshuffling SwMtrx
           CPD7 -> (C  4)    Moved. -> Reshuffling SwMtrx
           CPD3 -> (C 11)    Moved. -> Reshuffling SwMtrx
           CPD6 -> (C  5)    Moved. -> Reshuffling SwMtrx
           CPD4 -> (C 12)    Moved.
        NRDONLY -> (C  6)
        IOLATCH (D 15)

 Buried Logic>          NGUFLG       _7_TTSEL8
      Targets>   0(82)   8(73)

      _7_TTSEL8 (D  0) -> (B  8)
         NGUFLG (D  8) -> (B 16) (C 16)

 Buried Logic>        _2_RDSGN
      Targets>   1(81)   9(72)

       _2_RDSGN (D  1) -> (C  9) (D  9)



*** Macro Block Inputs

        NSTROBE (I  0) -> (D 24)
           SEL8 (I  2) -> (B 17) (D 16)
         NMAX8M (I  5) -> (A  4) (D  6)



*** Macro Block B

     _7_M154_Y1 (B 13) -> (B 13)
          NEN8B (B  2)
        NENEMBL (B  3)
           NWE1 (B  7)
           NWE0 (B 14)
            DIR (B  1)
        NENEMBH (B  4)
       NVIOLBRK (B  5)
         NEMRD0 (B 12)

 Buried Logic>       MAPCOVSEL
      Targets>   8(31)

      MAPCOVSEL (B  8) -> (A  8) (B 23) (D 23)

 Buried Logic>       _7_M167_2
      Targets>   9(30)

      _7_M167_2 (B  9) -> (B  5)

 Buried Logic>       _7_M163_2
      Targets>  10(29)

      _7_M163_2 (B 10) -> (B 10)



*** Macro Block A

       _7_X40_I (A 14) -> (A  2)
            MD8 (A 15)
       NEN512K0 (A  0)
       NEN512K1 (A  2)
         NEN1M0 (A  4)
         NEN1M1 (A  6)
         NEN2M0 (A  8)
         NEN2M1 (A  9)
         NEN2M2 (A 10)
         NEN2M3 (A 11)
         CEMA17 (A 13)

 Buried Logic>        _7_X27_Q
      Targets>  12(16)

       _7_X27_Q (A 12) -> (B  0) (C 17)

        N2MVLD1 (D  0)?
         NMEMRQ (B  0) -> (A  0) (B 25) (D 25)
        N2MVLD0 (D  1) -> (A  1) (C  1)
           EA16 (A  1) -> (A  9)
         N1MVLD (D  2)?
       N512KVLD (D  3)?
           EA17 (A  3) -> (A  3)
           EA18 (A  5) -> (A  5)
         NMCS2L (C  6)?
         NCPCS8 (C  7)?
           EA19 (A  7) -> (A  7)
         NMBEN0 (D  8) -> (B 22)
           CPS8 (C  8) -> (B 14) (C 14) (D 14)
        NBPBUS0 (B  8) -> (B 24)
         NMBEN1 (D  9)?
           CPS9 (C  9)?
        NBPBUS1 (B  9)?
           NERD (B 10) -> (B 11)
           NEWE (B 11) -> (A 12) (B 12)
           EA20 (A 12) -> (A 11)
        N2MVLD1 (D  0) -> (A 16) (C 22)
         N1MVLD (D  2) -> (A 24) (C 24)
       N512KVLD (D  3) ->   Blocked -> Reshuffling SwMtrx
       _2_NPMAP -> (D 17)    Moved. -> Reshuffling SwMtrx
       _2_M69_2 -> (D  0)    Moved. -> Reshuffling SwMtrx
           CPD3 -> (D 11)    Moved. -> Reshuffling SwMtrx
       _2_RDSGN -> (D  5)    Moved. -> Reshuffling SwMtrx
           CPD1 -> (D  9)    Moved.
       N512KVLD -> (D  3)
         NMCS2L (C  6) ->   Blocked -> Reshuffling SwMtrx
           CPD7 -> (C 18)    Moved. -> Reshuffling SwMtrx
         NBSEL1 -> (C  4)    Moved. -> Reshuffling SwMtrx
       _7_X27_Q -> (C 10)    Moved. -> Reshuffling SwMtrx
       _2_NPMAP -> (C 17)    Moved. -> Reshuffling SwMtrx
       _2_M69_2 -> (C  0)    Moved. -> Reshuffling SwMtrx
           CPD4 -> (C 20)    Moved. -> Reshuffling SwMtrx
        NRDONLY -> (C 12)    Moved.
         NMCS2L -> (C  6)   Blocked -> Reshuffling SwMtrx
         NBSEL1 -> (D 18)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (D 10)    Moved. -> Reshuffling SwMtrx
         NMAX8M -> (D  4)    Moved.
         NMCS2L -> (D  6)
         NCPCS8 (C  7) -> (C 23)   Blocked -> Reshuffling SwMtrx
          NENEM -> (D 21)    Moved.
         NCPCS8 -> (D  7)
         NMBEN1 (D  9) ->   Blocked -> Reshuffling SwMtrx
     _7_M154_Y1 -> (B 20)    Moved. -> Reshuffling SwMtrx
      DISRDONLY -> (B 13)    Moved.
         NMBEN1 -> (B  1)
           CPS9 (C  9) ->   Blocked -> Reshuffling SwMtrx
        NENVIOL -> (B 21)    Moved. -> Reshuffling SwMtrx
           SEL8 -> (B  2)    Moved. -> Reshuffling SwMtrx
      _7_M163_2 -> (B 17)    Moved. -> Reshuffling SwMtrx
           CPD2 -> (B 10)    Moved. -> Reshuffling SwMtrx
      _7_TTSEL8 -> (B  4)    Moved. -> Reshuffling SwMtrx
         NMBEN1 -> (B  8)    Moved.
           CPS9 -> (B  1)   Blocked -> Reshuffling SwMtrx
          NENEM -> (C 21)    Moved. -> Reshuffling SwMtrx
         NCPCS8 -> (C  7)    Moved. -> Reshuffling SwMtrx
        N2MVLD0 -> (C 23)    Moved.
           CPS9 -> (C  1) (D  1)
        NBPBUS1 (B  9) ->   Blocked -> Reshuffling SwMtrx
           CPD2 -> (B 18)    Moved. -> Reshuffling SwMtrx
       _7_X27_Q -> (B 10)    Moved. -> Reshuffling SwMtrx
         NMEMRQ -> (B  0)    Moved. -> Reshuffling SwMtrx
      _7_TTSEL8 -> (B 25)    Moved. -> Reshuffling SwMtrx
       _3_MODE1 -> (B  4)    Moved. -> Reshuffling SwMtrx
           CPS9 -> (B 15)    Moved.
        NBPBUS1 -> (B  1)





Wiring Completion:  100% -> (  0 nc)

|> INFORMATION F058 - Total Block Fanout (All Signals) *: 91 


*** Signals - Tabular Information

          Signal   #   P/N #   (Loc)      Type     Logic  # PT    Blocks
       NEN512K0    1     3      A  0     i/o pin    comb     6    .....
           EA16    2     4      A  1       input       .     .    .A...
       NEN512K1    3     5      A  2     i/o pin    comb     6    .....
           EA17    4     6      A  3       input       .     .    .A...
         NEN1M0    5     7      A  4     i/o pin    comb     6    .....
           EA18    6     8      A  5       input       .     .    .A...
         NEN1M1    7     9      A  6     i/o pin    comb     6    .....
           EA19    8    10      A  7       input       .     .    .A...
         NEN2M0    9    12      A  8     i/o pin    comb     2    .A...
         NEN2M1   10    13      A  9     i/o pin    comb     2    .....
         NEN2M2   11    14      A 10     i/o pin    comb     2    .....
         NEN2M3   12    15      A 11     i/o pin    comb     2    .....
           EA20   13    16      A 12       input       .     .    .A...
         CEMA17   14    17      A 13     i/o pin    comb     1    .....
            MD0   15    18      A 14     i/o pin    comb     1    ....D
            MD8   16    19      A 15     i/o pin    comb     1    ....D
        NSTROBE   17    20      I  0       input       .     .    ....D
           NWE0   18    25      B 14     i/o pin    comb     5    .....
         NEMRD1   19    26      B 13     i/o pin    comb     3    ....D
         NEMRD0   20    27      B 12     i/o pin    comb     1    .....
           NEWE   21    28      B 11       input       .     .    .AB..
           NERD   22    29      B 10       input       .     .    ..B..
        NBPBUS1   23    30      B  9       input       .     .    ..B..
        NBPBUS0   24    31      B  8       input       .     .    ..B..
           NWE1   25    33      B  7     i/o pin    comb     5    .....
       NVIOLBRK   26    35      B  5     i/o pin    comb     2    .....
        NENEMBH   27    36      B  4     i/o pin    comb     4    .....
        NENEMBL   28    37      B  3     i/o pin    comb     5    .....
          NEN8B   29    38      B  2     i/o pin    comb     5    .....
            DIR   30    39      B  1     i/o pin    comb     3    .....
         NMEMRQ   31    40      B  0       input       .     .    .AB.D
           SEL8   32    41      I  2       input       .     .    ..B.D
         NWEMAP   33    45      C  0     i/o pin    comb     1    .....
         NCSMAP   34    46      C  1     i/o pin    comb     1    .....
         NOEMAP   35    47      C  2     i/o pin    comb     2    .....
        NFCEMAP   36    48      C  3     i/o pin    d-ff     1    .....
         NMCS2L   37    51      C  6       input       .     .    ...CD
         NCPCS8   38    52      C  7       input       .     .    ...CD
           CPS8   39    54      C  8       input       .     .    ..BCD
           CPS9   40    55      C  9       input       .     .    ..BCD
           CPD0   41    56      C 10     i/o pin    comb     3    ...CD
           CPD1   42    57      C 11     i/o pin    comb     3    ...CD
           CPD2   43    58      C 12     i/o pin    comb     3    ..B.D
           CPD3   44    59      C 13     i/o pin    comb     3    ...CD
           CPD4   45    60      C 14     i/o pin    comb     2    ...C.
        NPRVIOL   46    61      C 15     i/o pin    comb     1    .....
         NPRCLK   47    62      I  3   clock pin       .     .    .....
          IOCLK   48    65      I  4   clock pin       .     .    .....
        IOLATCH   49    66      D 15     i/o pin    comb     1    .....
           CPD5   50    67      D 14     i/o pin    comb     2    ...C.
           CPD6   51    68      D 13     i/o pin    comb     2    ...C.
           CPD7   52    69      D 12     i/o pin    comb     1    ...C.
         NMBEN1   53    72      D  9       input       .     .    ..B..
         NMBEN0   54    73      D  8       input       .     .    ..B..
          NENEM   55    75      D  7     i/o pin    comb     1    ..BCD
        NRDONLY   56    76      D  6     i/o pin    comb     1    .ABC.
         NBSEL0   57    77      D  5     i/o pin    comb     1    ...CD
         NBSEL1   58    78      D  4     i/o pin    comb     1    ...CD
       N512KVLD   59    79      D  3       input       .     .    ....D
         N1MVLD   60    80      D  2       input       .     .    .A.C.
        N2MVLD0   61    81      D  1       input       .     .    .A.C.
        N2MVLD1   62    82      D  0       input       .     .    .A.C.
         NMAX8M   63    83      I  5       input       .     .    .A..D
       _7_X40_I   64    16      A 14    out pair    comb     1    .A...
        __AB6_O   65    17       .?.    out pair    comb     1    .....
        __AB5_O   66    30       .?.    out pair    comb     1    .....
     _7_M154_Y1   67    31      B 13    out pair    comb     3    ..B..
       _2_M90_I   68    34      C  0    out pair    comb     1    ....D
      _2_M140_O   69    44       .?.    out pair    comb     3    .....
      _2_M145_O   70    45       .?.    out pair    comb     3    .....
      _2_M146_O   71    46       .?.    out pair    comb     3    .....
      _2_M147_O   72    47       .?.    out pair    comb     3    .....
      _2_M149_O   73    48       .?.    out pair    comb     2    .....
        __AB2_O   74    54       .?.    out pair    comb     1    .....
        __AB1_O   75    55       .?.    out pair    comb     1    .....
        __AB3_O   76    56       .?.    out pair    comb     1    .....
        __AB4_O   77    57       .?.    out pair    comb     1    .....
       _2_M69_2   78    62      D 12    out pair    comb     1    ...CD
      _2_M151_O   79    63       .?.    out pair    comb     2    .....
      _2_M150_O   80    64       .?.    out pair    comb     2    .....
       _2_NPMAP   81    38      C  4      buried    d-ff     1    ...CD
     _2_NFOEMAP   82    43      C  9      buried    d-ff     1    ...C.
      MAPCOVSEL   83    26      B  8      buried    d-ff     1    .AB.D
      DISRDONLY   84    39      C  5      buried    d-ff     1    ..B..
        NENVIOL   85    40      C  6      buried    d-ff     1    ..B..
       _3_MODE0   86    41      C  7      buried    d-ff     1    ..BCD
       _3_MODE1   87    42      C  8      buried    d-ff     1    ..BCD
       _2_RDSGN   88    51      D  1      buried    comb     3    ...CD
         NGUFLG   89    58      D  8      buried    d-ff     1    ..BC.
       _7_X27_Q   90    14      A 12      buried    d-ff     1    ..BC.
      _7_TTSEL8   91    50      D  0      buried    comb     1    ..B..
      _7_M163_2   92    28      B 10      buried    comb     2    ..B..
      _7_M167_2   93    27      B  9      buried    comb     2    ..B..
.

 Key:
 P/N # - Pin/Node Number
 .?. - Signal Unplaced
 (Loc) - Macrocell Location (Block & Cell)
 # PT - Number of used product terms in logic
 Blocks- Device blocks driven by signal
 comb - Combinatorial logic function
 d-ff - D-Type Flip-flop
 t-ff - T-Type Flip-flop
 Note: Registered input storage equations (MACH-2xx family)
 ..... are realized with 0 array product terms.


*** Signals - Equations Where Used

   Signal Source                   Fanout List

           EA16:         NEN2M3          NEN2M2          NEN2M1          NEN2M0 
               :         NEN1M1          NEN1M0        NEN512K1        NEN512K0 
               {AAAA AAAA}

           EA17:         CEMA17          NEN2M3          NEN2M2          NEN2M1 
               :         NEN2M0          NEN1M1          NEN1M0        NEN512K1 
               :       NEN512K0 
               {AAAA AAAA A}

           EA18:         NEN2M3          NEN2M2          NEN2M1          NEN2M0 
               :         NEN1M1          NEN1M0        NEN512K1        NEN512K0 
               {AAAA AAAA}

           EA19:         NEN2M3          NEN2M2          NEN2M1          NEN2M0 
               :         NEN1M1          NEN1M0        NEN512K1        NEN512K0 
               {AAAA AAAA}

           EA20:         NEN2M3          NEN2M2          NEN2M1          NEN2M0 
               :         NEN1M1          NEN1M0        NEN512K1        NEN512K0 
               {AAAA AAAA}

        NSTROBE:         NGUFLG 
               {D}
           NEWE:       _7_X27_Q             DIR           NEN8B         NENEMBL 
               :        NENEMBH            NWE1            NWE0 
               {ABBB BBB}

           NERD:     _7_M154_Y1          NEMRD1           NEN8B         NENEMBL 
               :        NENEMBH            NWE1            NWE0 
               {BBBB BBB}

        NBPBUS1:      _7_M163_2           NEN8B         NENEMBH 
               {BBB}
        NBPBUS0:      _7_M167_2           NEN8B         NENEMBL 
               {BBB}
         NMEMRQ:       _7_X27_Q          NGUFLG           NEN8B         NENEMBL 
               :        NENEMBH            NWE1            NWE0 
               {ADBB BBB}

           SEL8:      _7_TTSEL8         NENEMBH 
               {DB}
         NMCS2L:       _2_RDSGN            CPD5            CPD5            CPD6 
               :           CPD6            CPD4            CPD4            CPD3 
               :           CPD3            CPD2            CPD2            CPD1 
               :           CPD1            CPD0            CPD0        _2_M90_I 
               :         NWEMAP          NOEMAP          NCSMAP 
               {DDDD DCCC CCCC CCCC CCC}

         NCPCS8:       _2_RDSGN            CPD5            CPD5            CPD6 
               :           CPD6            CPD4            CPD4            CPD3 
               :           CPD3            CPD2            CPD2            CPD1 
               :           CPD1            CPD0            CPD0         IOLATCH 
               {DDDD DCCC CCCC CCCD}

           CPS8:      _7_M167_2       _7_M163_2        _2_M90_I          NWEMAP 
               :        IOLATCH             DIR 
               {BBCC DB}

           CPS9:       _2_RDSGN            CPD5            CPD5            CPD6 
               :           CPD6            CPD4            CPD4            CPD3 
               :           CPD3            CPD2            CPD2            CPD1 
               :           CPD1            CPD0            CPD0      _7_M154_Y1 
               :         NEMRD1          NOEMAP 
               {DDDD DCCC CCCC CCCB BC}

           CPD0:       _2_NPMAP          NBSEL0          NBSEL0 
               {CDD}
           CPD1:     _2_NFOEMAP          NBSEL1          NBSEL1 
               {CDD}
           CPD2:      MAPCOVSEL         NRDONLY         NRDONLY 
               {BDD}
           CPD3:      DISRDONLY           NENEM           NENEM 
               {CDD}
           CPD4:        NFCEMAP 
               {C}
           CPD5:        NENVIOL 
               {C}
           CPD6:       _3_MODE0 
               {C}
           CPD7:       _3_MODE1 
               {C}
         NMBEN1:          NEN8B         NENEMBH            NWE1 
               {BBB}
         NMBEN0:        NENEMBL            NWE0 
               {BB}
          NENEM:         NGUFLG            CPD3            CPD3           NEN8B 
               :        NENEMBL         NENEMBH            NWE1            NWE0 
               {DCCB BBBB}

        NRDONLY:       _7_X27_Q            CPD2            CPD2            NWE1 
               :           NWE0 
               {ACCB B}

         NBSEL0:         NGUFLG            CPD0            CPD0 
               {DCC}
         NBSEL1:         NGUFLG            CPD1            CPD1 
               {DCC}
       N512KVLD:           CPD6            CPD6 
               {DD}
         N1MVLD:           CPD2            CPD2          NEN2M3          NEN2M2 
               :         NEN2M1          NEN2M0          NEN1M1          NEN1M0 
               :       NEN512K1        NEN512K0 
               {CCAA AAAA AA}

        N2MVLD0:           CPD3            CPD3          NEN2M3          NEN2M2 
               :         NEN2M1          NEN2M0          NEN1M1          NEN1M0 
               :       NEN512K1        NEN512K0 
               {CCAA AAAA AA}

        N2MVLD1:           CPD4            CPD4          NEN2M3          NEN2M2 
               :         NEN2M1          NEN2M0          NEN1M1          NEN1M0 
               :       NEN512K1        NEN512K0 
               {CCAA AAAA AA}

         NMAX8M:           CPD5            CPD5          CEMA17          NEN2M3 
               :         NEN2M2          NEN2M1          NEN2M0          NEN1M1 
               :         NEN1M0        NEN512K1        NEN512K0 
               {DDAA AAAA AAA}

       _7_X40_I:            MD8             MD8 
               {AA}
     _7_M154_Y1:         NEMRD0          NEMRD0 
               {BB}
       _2_M90_I:          NENEM         NRDONLY          NBSEL0          NBSEL1 
               {DDDD}
       _2_M69_2:           CPD6            CPD6            CPD4            CPD4 
               :           CPD3            CPD3            CPD2            CPD2 
               :           CPD1            CPD1            CPD0            CPD0 
               {DDCC CCCC CCCC}

       _2_NPMAP:       _2_RDSGN            CPD3            CPD3            CPD2 
               :           CPD2            CPD1            CPD1            CPD0 
               :           CPD0        _2_M90_I          NWEMAP          NOEMAP 
               :         NCSMAP 
               {DCCC CCCC CCCC C}

     _2_NFOEMAP:         NOEMAP 
               {C}
      MAPCOVSEL:      _7_TTSEL8             MD8             MD0         NENEMBL 
               :        NENEMBH            NWE1            NWE0 
               {DAAB BBB}

      DISRDONLY:           NWE1            NWE0 
               {BB}
        NENVIOL:       NVIOLBRK 
               {B}
       _3_MODE0:      _7_M167_2       _7_M163_2        _2_RDSGN            CPD5 
               :           CPD5            CPD6            CPD6            CPD4 
               :           CPD4            CPD3            CPD3            CPD2 
               :           CPD2            CPD1            CPD1            CPD0 
               :           CPD0      _7_M154_Y1          NEMRD1         NPRVIOL 
               :            DIR           NEN8B         NENEMBL         NENEMBH 
               :           NWE1            NWE0 
               {BBDD DDDC CCCC CCCC CBBC BBBB BB}

       _3_MODE1:      _7_M167_2       _7_M163_2        _2_RDSGN            CPD5 
               :           CPD5            CPD6            CPD6            CPD4 
               :           CPD4            CPD3            CPD3            CPD2 
               :           CPD2            CPD1            CPD1            CPD0 
               :           CPD0      _7_M154_Y1          NEMRD1         NPRVIOL 
               :            DIR           NEN8B         NENEMBL         NENEMBH 
               :           NWE1            NWE0 
               {BBDD DDDC CCCC CCCC CBBC BBBB BB}

       _2_RDSGN:           CPD5            CPD6            CPD7            CPD4 
               :           CPD3            CPD2            CPD1            CPD0 
               {DDDC CCCC}

         NGUFLG:           CPD1            CPD1        NVIOLBRK 
               {CCB}
       _7_X27_Q:           CPD0            CPD0        NVIOLBRK 
               {CCB}
      _7_TTSEL8:          NEN8B 
               {B}
      _7_M163_2:           NWE1 
               {B}
      _7_M167_2:           NWE0 
               {B}



*** Outputs with no feedback

         NEN512K0        NEN512K1          NEN1M0          NEN1M1          NEN2M0 
           NEN2M1          NEN2M2          NEN2M3          CEMA17             MD0 
              MD8            NWE0          NEMRD1          NEMRD0            NWE1 
         NVIOLBRK         NENEMBH         NENEMBL           NEN8B             DIR 
           NWEMAP          NCSMAP          NOEMAP         NFCEMAP         NPRVIOL 
          IOLATCH 


*** Feedback Map - THE MEMORY MAP CONTROL FOR MICHELLE

 Gbl Inp .--.     I/O  .--+--A--+--.  I/O           I/O  .--+--B--+--.  I/O   
         | 0|   NMEMRQ : 0|     |25|              NMEMRQ : 0|     |25| _7_TTSE
         | 1|  N2MVLD0 : 1|     |24| N1MVLD      NBPBUS1 : 1|     |24| NBPBUS0
         | 2|  _7_X40_I  2|     |23|                SEL8 : 2|     |23| MAPCOVS
         | 3|     EA17 : 3|     |22|             _3_MODE0  3|     |22| NMBEN0 
         | 4|   NMAX8M : 4|     |21|             _3_MODE1  4|     |21| NENVIOL
         | 5|     EA18 : 5|     |20|             _7_M167_  5|     |20| _7_M154
         '--'  NRDONLY : 6|     |19|             NRDONLY : 6|     |19|        
                  EA19 : 7|     |18|               NENEM : 7|     |18| CPD2   
               MAPCOVSE  8|     |17|              NMBEN1 : 8|     |17| _7_M163
                  EA16 : 9|     |16| N2MVLD1             | 9|     |16| NGUFLG 
K:  * Used             |10|     |15|             _7_X27_Q 10|     |15: CPS9   
    . Avail       EA20 :11|     |14|                NERD :11|     |14: CPS8   
    # N/A         NEWE :12|     |13|                NEWE :12|     |13: DISRDON
                       '--+--C--+--'                     '--+--D--+--'        
               _2_M69_2  0|     |25| CPD1        _2_M69_2  0|     |25| NMEMRQ 
                  CPS9 : 1|     |24| N1MVLD         CPS9 : 1|     |24| NSTROBE
                  CPD0 : 2|     |23| N2MVLD0        CPD0 : 2|     |23| MAPCOVS
               _3_MODE0  3|     |22| N2MVLD1     N512KVLD  3|     |22| _3_MODE
                NBSEL1 : 4|     |21| NENEM        NMAX8M : 4|     |21| NENEM  
                  CPD6 : 5|     |20| CPD4        _2_RDSGN  5|     |20|        
                NMCS2L : 6|     |19| NBSEL0       NMCS2L : 6|     |19| NBSEL0 
                NCPCS8 : 7|     |18| CPD7         NCPCS8 : 7|     |18| NBSEL1 
               _2_NFOEM  8|     |17| _2_NPMA     _2_M90_I  8|     |17| _2_NPMA
               _2_RDSGN  9|     |16| NGUFLG         CPD1 : 9|     |16| SEL8   
               _7_X27_Q 10|     |15: _3_MODE        CPD2 :10|     |15: _3_MODE
                  CPD3 :11|     |14: CPS8           CPD3 :11|     |14: CPS8   
               NRDONLY :12|     |13: CPD5                |12|     |13|        
                       '--+-u--u+--'                     '--+-u--u+--'        



*** Logic Map - THE MEMORY MAP CONTROL FOR MICHELLE

 Gbl Inp .--.     I/O  .--+--A--+--.  I/O           I/O  .--+--B--+--.  I/O   
         | 0|  NEN512K0  0| 6  #|25|              NMEMRQ | 0| *  #|25|        
         | 1|          | 1| *  #|24|                 DIR | 1| 3  #|24|        
         | 2|  NEN512K1  2| 6  #|23|               NEN8B | 2| 5  #|23|        
         | 3|     EA17 | 3| *  #|22|             NENEMBL | 3| 5  #|22|        
         | 4|   NEN1M0 | 4| 6  #|21|             NENEMBH | 4| 4  #|21|        
         | 5|     EA18 | 5| *  #|20|             NVIOLBRK  5| 2  #|20|        
         '--'   NEN1M1 | 6| 6  #|19|                     | 6| *  #|19|        
                  EA19 | 7| *  #|18|                NWE1 | 7| 5  #|18|        
                NEN2M0 | 8| 2  #|17|             MAPCOVSE  8| 1  #|17|        
                NEN2M1 | 9| 2  #|16|             _7_M167_  9| 2  #|16|        
K:  * Used      NEN2M2 |10| 2  1|15| MD8         _7_M163_ 10| 2  *|15|        
    . Avail     NEN2M3 |11| 2  1|14| MD0                 |11| *  5|14| NWE0   
    # N/A      _7_X27_Q 12| 1  1|13| CEMA17       NEMRD0 |12| 1  3|13| NEMRD1 
                       '--+--C--+--'                     '--+--D--+--'        
                NWEMAP | 0| 1  #|25|             _7_TTSEL  0| 1  #|25|        
                NCSMAP | 1| 1  #|24|             _2_RDSGN  1| 3  #|24|        
                NOEMAP | 2| 2  #|23|                     | 2| .  #|23|        
               NFCEMAP | 3| 1  #|22|             N512KVLD  3| .  #|22|        
               _2_NPMAP  4| 1  #|21|              NBSEL1 | 4| 1  #|21|        
               DISRDONL  5| 1  #|20|              NBSEL0 | 5| 1  #|20|        
               NENVIOL | 6| 1  #|19|             NRDONLY | 6| 1  #|19|        
               _3_MODE0  7| 1  #|18|               NENEM | 7| 1  #|18|        
               _3_MODE1  8| 1  #|17|              NGUFLG | 8| 1  #|17|        
               _2_NFOEM  9| 1  #|16|                     | 9| .  #|16|        
                  CPD0 |10| 3  1|15| NPRVIOL             |10| .  1|15| IOLATCH
                  CPD1 |11| 3  2|14| CPD4                |11| .  2|14| CPD5   
                  CPD2 |12| 3  3|13| CPD3           CPD7 |12| 1  2|13| CPD6   
                       '--+-u--u+--'                     '--+-u--u+--'        


*** Pin Map - THE MEMORY MAP CONTROL FOR MICHELLE
                                                                         
                                                                         
                                                                         
                                                                         
                                            NMAX8M                       
                             NEN512K0       | N2MVLD1                    
                               EA16 |       | | N2MVLD0                  
                         NEN512K1 | |       | | | N1MVLD                 
                           EA17 | | |       | | | | N512KVLD             
                       NEN1M0 | | | |       | | | | | NBSEL1             
                       EA18 | | | | |       | | | | | | NBSEL0           
                   NEN1M1 | | | | | |       | | | | | | | NRDONLY        
                   EA19 | | | | | | |       | | | | | | | | NENEM        
                      | | | | | | | |       | | | | | | | | |            
               .------'-'-'-'-'-'-'-'---o---'-'-'-'-'-'-'-'-'----.       
               |    1 1                   8 8 8 8 8 7 7 7 7 7    |       
               |    1 0 9 8 7 6 5 4 3 2 1 4 3 2 1 0 9 8 7 6 5    |       
         NEN2M0|12                                         Gnd 74|       
         NEN2M1|13  G                 V G V                    73|NMBEN0 
         NEN2M2|14  n                 c n c                    72|NMBEN1 
         NEN2M3|15  d                 c d c                    71|       
           EA20|16                                             70|       
         CEMA17|17                                             69|CPD7   
            MD0|18                                             68|CPD6   
            MD8|19                                             67|CPD5   
        NSTROBE|20                                             66|IOLATCH
               |21 Vcc               MACH-130                  65|IOCLK  
               |22 Gnd                                     Gnd 64|       
               |23                                         Vcc 63|       
               |24                                             62|NPRCLK 
           NWE0|25                                             61|NPRVIOL
         NEMRD1|26                                             60|CPD4   
         NEMRD0|27                                             59|CPD3   
           NEWE|28                                             58|CPD2   
           NERD|29                    V G V                 G  57|CPD1   
        NBPBUS1|30                    c n c                 n  56|CPD0   
        NBPBUS0|31                    c d c                 d  55|CPS9   
               |32 Gnd                                         54|CPS8   
               |    3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 5 5 5 5    |       
               |    3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3    |       
               '----.-.-.-.-.-.-.-.-.-------.-.-.-.-.-.-.-.------'       
                    | | | | | | | | |       | | | | | | | |              
                 NWE1 | | | | | | | |       | | | | | | | |              
                      ' | | | | | | |       | | | | | | | NCPCS8         
                 NVIOLBRK | | | | | |       | | | | | | NMCS2L           
                    NENEMBH | | | | |       | | | | | '                  
                      NENEMBL | | | |       | | | | '                    
                          NEN8B | | |       | | | NFCEMAP                
                              DIR | |       | | NOEMAP                   
                             NMEMRQ |       | NCSMAP                     
                                 SEL8       NWEMAP                       
The Jedec Data is  stored in ===> Ovmach.jed
The Placements are stored in ===> Ovmach.plc
The Design Doc is  stored in ===> Ovmach.rpt
 
%% FITR %% Error Count: 0, Warning Count: 1
%% FITR %% File Processed Successfully. - File: Ovmach.pds
 
