;-------------------------------------------------------------------------
; Code Warrior config.txt file for Motorolas Sandpoint with PPC 8240 CPU
;-------------------------------------------------------------------------

;------------------------------------------------------------------
; Note that all registers are indirectly addressed through 
; 0xFEC0_0000, and data is written through 0xFEE0_0000.  Note also
; that the MPC106 is little-endian, but the 'writemem' instruction
; is big-endian, so that all data had to be byte-swapped manually.
;------------------------------------------------------------------



;PLTR
writemem.l	0xFEC00000	0x0d000080
writemem.b	0xFEE00001	0x00000040
  
;LMBBAR0
writemem.l	0xFEC00000	0x10000080
writemem.l	0xFEE00000	0x08000000
  
;PCSRBAR    
writemem.l	0xFEC00000	0x14000080
writemem.l	0xFEE00000	0x000000b0

;LMBBAr7
writemem.l	0xFEC00000	0x18000080
writemem.l	0xFEE00000	0x08000000
    
;ILR
writemem.l	0xFEC00000	0x3c000080
writemem.b	0xFEE00000	0x00000000
  
;PGCR
writemem.l  0xFEC00000  0x44000080
writemem.w  0xFEE00000  0x00000000
  
;PCIARB
writemem.l	0xFEC00000	0x46000080
writemem.w	0xFEE00002	0x00000080
  
;PMCR1
writemem.l	0xFEC00000	0x70000080
writemem.w	0xFEE00000	0x00000000

;PMCR2
writemem.l	0xFEC00000	0x72000080
writemem.b	0xFEE00002	0x00000020

;OCDMCR
writemem.l	0xFEC00000	0x73000080
writemem.b	0xFEE00003	0x000000FF
  
;CLKDCR
writemem.l	0xFEC00000	0x74000080
writemem.w	0xFEE00000	0x00000000

;MCR1
writemem.l	0xFEC00000	0x76000080
writemem.b	0xFEE00002	0x00000000
  
;EUMBBAR
writemem.l	0xFEC00000	0x78000080
writemem.l	0xFEE00000	0x000000FC
  
;MSADDR1
writemem.l	0xFEC00000	0x80000080
writemem.l	0xFEE00000	0x00FFFFFF
  
;MSADDR2
writemem.l	0xFEC00000	0x84000080
writemem.l	0xFEE00000	0xFFFFFFFF       
  
;EMSADDR1
writemem.l	0xFEC00000	0x88000080
writemem.l	0xFEE00000	0x00030303
  
;EMSADDR2
writemem.l	0xFEC00000	0x8c000080
writemem.l	0xFEE00000	0x03030303
  
;EMEADDR1
writemem.l	0xFEC00000	0x90000080
writemem.l	0xFEE00000	0x1fffffff
  
;EMEADDR2
writemem.l	0xFEC00000	0x94000080
writemem.l	0xFEE00000	0xffffffff
  
;EXTEMEM1
writemem.l	0xFEC00000	0x98000080
writemem.l	0xFEE00000	0x00030303
  
;EXTEMEM2
writemem.l	0xFEC00000	0x9c000080
writemem.l	0xFEE00000	0x03030303
  
;MEMBNKEN
writemem.l	0xFEC00000	0xa0000080
writemem.b	0xFEE00000	0x00000001

;MEMPMODE  disable the page mode
writemem.l	0xFEC00000	0xa3000080
writemem.b	0xFEE00003  0x00000000


  
;ECCCNT
writemem.l	0xFEC00000	0xb8000080
writemem.b	0xFEE00000	0x00000000

;ECCSTR
writemem.l	0xFEC00000	0xb8000080
writemem.b	0xFEE00001	0x00000000
  
;ERRENR1
writemem.l	0xFEC00000	0xc0000080
writemem.b	0xFEE00000	0x00000021


;ERRENR2
writemem.l	0xFEC00000	0xc4000080
writemem.b	0xFEE00000	0x00000000
  
;ERCR1 
writemem.l	0xFEC00000	0xd0000080
writemem.l	0xFEE00000	0x0000ff05
  
;ERCR2
writemem.l	0xFEC00000	0xd4000080
writemem.l	0xFEE00000	0x0000ff05
  
;ERCR3
writemem.l	0xFEC00000	0xd8000080
writemem.l	0xFEE00000	0x0e00000c
  
;ERCR4
writemem.l	0xFEC00000	0xdc000080
writemem.l	0xFEE00000	0x0e00000c
  
;AMBOR
writemem.l	0xFEC00000	0xe0000080
writemem.l	0xFEE00000	0x810080ab
  
;MCCR2
writemem.l	0xFEC00000	0xf4000080
writemem.l	0xFEE00000	0xc010E0FF
  
;MCCR3
writemem.l	0xFEC00000	0xf8000080
writemem.l	0xFEE00000	0x00000000
  
;MCCR4
writemem.l	0xFEC00000	0xfc000080
writemem.l	0xFEE00000	0x00321200
  
;MCCR1
writemem.l	0xFEC00000	0xf0000080
writemem.l	0xFEE00000	0x0000a8FF
  
;PICR1
writemem.l	0xFEC00000	0xa8000080
writemem.l	0xFEE00000	0x18121400
  
;PICR2
writemem.l	0xFEC00000	0xAC000080
writemem.l	0xFEE00000	0x0D000C04

writereg MSR 0x00003002
