#----------------------------------------------------------------------------
# MPC8xx Family Applications Development System (FADS) Eng Rev Initialization
#----------------------------------------------------------------------------

writereg IMMR	0xFF000000
writemmr SYPCR	0xFFFFFF88
writemmr SIUMCR	0x01632440	# different than other 8xx FADS

writereg MSR	0x00001002
writereg SRR1	0x00001002
writereg ICTRL	0x00000007

writemmr PLPRCRK	0x55CCAA33 # Unlock PLPRCR Register
writemmr PLPRCR		0x00500000 # PLPRCR - 25MHz


#--------------------------------------------------------------------
# UPMA Initialization for DRAM @ 25Mhz - EDO, 4K, 60ns
#--------------------------------------------------------------------

# Single Read
writeupma 0x00 0xFFFFCC24
writeupma 0x01 0x0FFFCC24
writeupma 0x02 0x0FFFCC04
writeupma 0x03 0x0CFFCC04
writeupma 0x04 0x00FFCC04
writeupma 0x05 0x00FFCC00
writeupma 0x06 0x37FFCC47
writeupma 0x07 0xFFFFFFFF

# Burst Read
writeupma 0x08 0xFFFFCC24
writeupma 0x09 0x0FFFCC24
writeupma 0x0A 0x0FFFCC04
writeupma 0x0B 0x08FFCC04
writeupma 0x0C 0x00FFCC04
writeupma 0x0D 0x00FFCC08
writeupma 0x0E 0x0CFFCC44
writeupma 0x0F 0x00FFEC0C
writeupma 0x10 0x03FFEC00
writeupma 0x11 0x00FFEC44
writeupma 0x12 0x00FFCC08
writeupma 0x13 0x0CFFCC44
writeupma 0x14 0x00FFEC04
writeupma 0x15 0x00FFEC00
writeupma 0x16 0x3FFFEC47
writeupma 0x17 0xFFFFFFFF

# Single Write
writeupma 0x18 0xFFFFCC24
writeupma 0x19 0x0FAFCC24
writeupma 0x1A 0x0FAFCC04
writeupma 0x1B 0x08AFCC04
writeupma 0x1C 0x00AFCC00
writeupma 0x1D 0x37FFCC47
writeupma 0x1E 0xFFFFFFFF
writeupma 0x1F 0xFFFFFFFF

# Burst Write
writeupma 0x20 0xFFFFCC24
writeupma 0x21 0x0FAFCC24
writeupma 0x22 0x0FAFCC04
writeupma 0x23 0x08AFCC00
writeupma 0x24 0x07AFCC4C
writeupma 0x25 0x08AFCC00
writeupma 0x26 0x07AFCC4C
writeupma 0x27 0x08AFCC00
writeupma 0x28 0x07AFCC4C
writeupma 0x29 0x08AFCC00
writeupma 0x2A 0x37AFCC47
writeupma 0x2B 0xFFFFFFFF
writeupma 0x2C 0xFFFFFFFF
writeupma 0x2D 0xFFFFFFFF
writeupma 0x2E 0xFFFFFFFF
writeupma 0x2F 0xFFFFFFFF

# Refresh
writeupma 0x30 0xE0FFCC84
writeupma 0x31 0x00FFCC04
writeupma 0x32 0x00FFCC04
writeupma 0x33 0x0FFFCC04
writeupma 0x34 0x7FFFCC04
writeupma 0x35 0xFFFFCC86
writeupma 0x36 0xFFFFCC05
writeupma 0x37 0xFFFFFFFF
writeupma 0x38 0xFFFFFFFF
writeupma 0x39 0xFFFFFFFF
writeupma 0x3A 0xFFFFFFFF
writeupma 0x3B 0xFFFFFFFF

# Exception
writeupma 0x3C 0x33FFCC07
writeupma 0x3D 0xFFFFFFFF
writeupma 0x3E 0xFFFFFFFF
writeupma 0x3F 0xFFFFFFFF


#--------------------------------------------------------------------
# UPMB Initialization for SDRAM (FADS Only!)
#--------------------------------------------------------------------

# Single Read
writeupmb 0x00 0x0126cc04
writeupmb 0x01 0x0fb98c00
writeupmb 0x02 0x1ff74c45
writeupmb 0x03 0xffffffff
writeupmb 0x04 0xffffffff
writeupmb 0x05 0x1fe77c34
writeupmb 0x06 0xefaabc34
writeupmb 0x07 0x1fa57c35

# Burst Read
writeupmb 0x08 0x0026fc04
writeupmb 0x09 0x10adfc00
writeupmb 0x0A 0xf0affc00
writeupmb 0x0B 0xf1affc00
writeupmb 0x0C 0xefbbbc00
writeupmb 0x0D 0x1ff77c45
writeupmb 0x0E 0xffffffff
writeupmb 0x0F 0xffffffff
writeupmb 0x10 0xffffffff
writeupmb 0x11 0xffffffff
writeupmb 0x12 0xffffffff
writeupmb 0x13 0xffffffff
writeupmb 0x14 0xffffffff
writeupmb 0x15 0xffffffff
writeupmb 0x16 0xffffffff
writeupmb 0x17 0xffffffff

# Single Write
writeupmb 0x18 0x0e26bc04
writeupmb 0x19 0x01b93c00
writeupmb 0x1A 0x1ff77c45
writeupmb 0x1B 0xffffffff
writeupmb 0x1C 0xffffffff
writeupmb 0x1D 0xffffffff
writeupmb 0x1E 0xffffffff
writeupmb 0x1F 0xffffffff

# Burst Write
writeupmb 0x20 0x0e26bc00
writeupmb 0x21 0x10ad7c00
writeupmb 0x22 0xf0affc00
writeupmb 0x23 0xf0affc00
writeupmb 0x24 0xe1bbbc04
writeupmb 0x25 0x1ff77c45
writeupmb 0x26 0xffffffff
writeupmb 0x27 0xffffffff
writeupmb 0x28 0xffffffff
writeupmb 0x29 0xffffffff
writeupmb 0x2A 0xffffffff
writeupmb 0x2B 0xffffffff
writeupmb 0x2C 0xffffffff
writeupmb 0x2D 0xffffffff
writeupmb 0x2E 0xffffffff
writeupmb 0x2F 0xffffffff

# Refresh
writeupmb 0x30 0x1ff5fc84
writeupmb 0x31 0xfffffc04
writeupmb 0x32 0xfffffc84
writeupmb 0x33 0xfffffc05
writeupmb 0x34 0xffffffff
writeupmb 0x35 0xffffffff
writeupmb 0x36 0xffffffff
writeupmb 0x37 0xffffffff
writeupmb 0x38 0xffffffff
writeupmb 0x39 0xffffffff
writeupmb 0x3A 0xffffffff
writeupmb 0x3B 0xffffffff

# Exception
writeupmb 0x3C 0x7ffffc07
writeupmb 0x3D 0xffffffff
writeupmb 0x3E 0xffffffff
writeupmb 0x3F 0xffffffff


#--------------------------------------------------------------------
# Set up the chip selects for flash, RAM, and board control regs
#--------------------------------------------------------------------

writemmr MAMR	0xc0a21114 # MAMR - 25MHz
writemmr MBMR	0x60802114 # MBMR - 25MHz (FADS Only!)

writemmr BR0 	0xFFE00001 # BR0 - Flash starts at 0xFFE00000
writemmr OR0 	0xffe00954 # OR0 - 25Mhz
writemmr BR1 	0xf0000001 # BR1 
writemmr OR1 	0xffff8110 # OR1
writemmr BR2 	0x00000081 # BR2 - DRAM starts at 0x00000000
writemmr OR2 	0xfe000800 # OR2
writemmr BR4 	0x030000c1 # BR4 - SDRAM starts at 0x03000000 (FADS Only!)
writemmr OR4 	0xffc00a00 # OR4

#--------------------------------------------------------------------
# Additional initialization required for the SDRAM on the FADS board.
# See FADS manual section 4.8.1.1
#--------------------------------------------------------------------

writemmr MAR 	0x00000048 # MAR = 0x48
writemmr MCR 	0x80808105 # MCR = 0x80808105
writemmr MBMR 	0x60802118 # Set TFLB field of MBMR to 8
writemmr MCR 	0x80808130 # MCR = 0x80808130
writemmr MBMR	0x60802114 # Restore original MBMR


#--------------------------------------------------------------------
# The debugger sets the DER register based on the EPPC Exceptions
# preference panel after running this initialization file, this
# this value will be overwritten.  We only put it in here because
# the flash programmer uses this file also.
#--------------------------------------------------------------------
writereg	DER		0x73e67c0f
