#######################################
#FILE
# $RCSfile: 852_EP_init.cfg,v $
# $Date: 2004/11/15 11:21:37 $
# $Revision: 1.1 $
#DESCRIPTION
#--------------------------------------------------------------------
# Configuration for EP852 REV 11 with MPC 852T processor
# This file sets the board for:
#	- 50MHz operation
# Please consult your Users Guide for information on setting
# the board to run at a different speed.
#--------------------------------------------------------------------
#COPYRIGHT 
# (c) 2004 Metrowerks Corporation
# All rights reserved.
#HISTORY
# $Log: 852_EP_init.cfg,v $
# Revision 1.1  2004/11/15 11:21:37  c-dnegrea
# files moved from BDM to PQ1 folder
#
# Revision 1.3  2004/06/04 14:12:34  vcambrea
# updated UPMA configuration
# 
########################################


writereg	IMMR		0xFA200000
writemmr	SYPCR		0xFFFFFF89 

writereg	MSR		0x00001002
writereg	SRR1		0x00001002

#SIU configuration
writereg	ICTRL		0x00000007 # no show cycle 
writemmr	SIUMCR		0x01000800

#Clock signals configuration
writemmr	SCCRK		0x55CCAA33 # Unlock SCCR Register
writemmr	SCCR  		0x03020800 # CLKOUT is GCLK2 divided by 2, BRGCLK is divout1 divided by 4.
writemmr	SCCRK		0x00000000 # Lock SCCR Register

writemmr	PLPRCRK		0x55CCAA33 # Unlock PLPRCR Register
writemmr	PLPRCR		0x000A4000 # PLPRCR
writemmr	PLPRCRK		0x00000000 # Lock PLPRCR Register

#--------------------------------------------------------------------
# UPMA Initialization for SDRAM
#--------------------------------------------------------------------
# 
# Greater Than 40 MHz UPM RAM Words
#
# Single Read
writeupma	0x00 0xEFCBCC04
writeupma	0x01 0x0F37C804
writeupma	0x02 0x0EEEC004
writeupma	0x03 0x01B98404
writeupma	0x04 0x1FF74C00
writeupma	0x05 0xFFFFCC05
writeupma	0x06 0xFFFFCC05
writeupma	0x07 0xFFFFCC05

# Burst Read
writeupma	0x08 0xEFCBCC04
writeupma	0x09 0x0F37C804
writeupma	0x0A 0x0EEEC004
writeupma	0x0B 0x00BDC404
writeupma	0x0C 0x00FFCC00
writeupma	0x0D 0x00FFCC00
writeupma	0x0E 0x01FB8C00
writeupma	0x0F 0x1FF74C00
writeupma	0x10 0xFFFFCC05
writeupma	0x11 0xFFFFCC05
writeupma	0x12 0xFFFFCC05
writeupma	0x13 0xFFFFCC05
writeupma	0x14 0xFFFFCC05
writeupma	0x15 0xFFFFCC05
writeupma	0x16 0xFFFFCC05
writeupma	0x17 0xFFFFCC05

# Single Write
writeupma	0x18 0xEFCBCC04
writeupma	0x19 0x0F37C804
writeupma	0x1A 0x0EEE8002
writeupma	0x1B 0x01B90404
writeupma	0x1C 0x1FF74C05
writeupma	0x1D 0xFFFFCC05
writeupma	0x1E 0xFFFFCC05
writeupma	0x1F 0xFFFFCC05

# Burst Write
writeupma	0x20 0xEFCBCC04
writeupma	0x21 0x0F37C804
writeupma	0x22 0x0EEE8000
writeupma	0x23 0x00BD4400
writeupma	0x24 0x00FFCC00
writeupma	0x25 0x00FFCC02
writeupma	0x26 0x01FB8C04
writeupma	0x27 0x1FF74C05
writeupma	0x28 0xFFFFCC05
writeupma	0x29 0xFFFFCC05
writeupma	0x2A 0xFFFFCC05
writeupma	0x2B 0xFFFFCC05
writeupma	0x2C 0xFFFFCC05
writeupma	0x2D 0xFFFFCC05
writeupma	0x2E 0xFFFFCC05
writeupma	0x2F 0xFFFFCC05

# Refresh
writeupma	0x30 0xEFFACC04
writeupma	0x31 0x0FF5CC04
writeupma	0x32 0x0FFFCC04
writeupma	0x33 0x1FFFCC04
writeupma	0x34 0xFFFFCC05
writeupma	0x35 0xFFFFCC05
writeupma	0x36 0xEFFB8C34
writeupma	0x37 0x0FF74C34
writeupma	0x38 0x0FFACCB4
writeupma	0x39 0x0FF5CC34
writeupma	0x3A 0x0FFFC034
writeupma	0x3B 0x0FFFC0B4

# Exception
writeupma	0x3C 0x0FEA8034
writeupma	0x3D 0x1FB54034
writeupma	0x3E 0xFFFFCC34
writeupma	0x3F 0xFFFFCC05


#--------------------------------------------------------------------
# Set up the chip selects for flash, RAM, and board control regs
#--------------------------------------------------------------------
writemmr	MPTPR 	0x2000     #(IMMR & FFFF0000) + 0x17A
writemmr	MAMR	0x58803000 #

writemmr	MAR		0x00000088	# (IMMR & FFFF0000) + 0x164
writemmr	MCR		0x80002236	# (IMMR & FFFF0000) + 0x168

# CS0 - FLASH 8 MB
writemmr	BR0		0xFF800001
writemmr	OR0		0xFF800140 # 50MHz

# CS1 - SDRAM 16 MB
writemmr	OR1		0xFF000600
writemmr	BR1		0x00000081

# CS3 - BCSR
writemmr	OR3		0xFF7F8970 # 50MHz
writemmr	BR3		0xFA400001

#--------------------------------------------------------------------
# Enable the BCSRs by writting the first time and turn "on" LEDs
#--------------------------------------------------------------------
writemem.b 0xFA400000 0x3F

sleep 750  # Slight delay for the UART

#--------------------------------------------------------------------
# The debugger sets the DER register based on the EPPC Exceptions
# preference panel after running this initialization file, this
# this value will be overwritten.  We only put it in here because
# the flash programmer uses this file also.
#--------------------------------------------------------------------
writereg	DER		0x73e67c0f 

