!
rem                                     
rem NAND flash programming include file                                                       
rem                                             
rem --------------------                                                                     
rem Init system register                                                                     
rem--------------------                                                                     
rem init mpmc                                                                                
long 0xb1000000 0x01                                                                 
long 0xb1000200 0x80                                                                 
long 0xb1000220 0x81                                                                 
rem enable nand flash                                                                        
long 0xb2000064 0x100                                                                
long 0xb2000008 0x1                                                                  
rem-----------------------                                                                  
rem page write cycle                                                                        
rem-----------------------      
$port = 0xb0000000                                                            
rem deassert WP# Write protect                                                              
outport $port+0xa 0x1                                                                
rem deassert SP#                                                                            
outport $port+0x8 0x1                                                                
rem assert CE#                                                                              
outport $port+0x1 0x1                                                                
rem assert CLE                                                                              
outport $port+0x4 0x1                                                                
rem Issue read data command                                                                 
outport $port 0x00                                                               
rem deassert CLE                                                                            
outport $port+0x3 0x1                                                                
rem assert ALE                                                                              
outport $port+0x6 0x1                                                                
rem Issue start address                                                                     
outport $port 0x0
outport $port 0x0
outport $port 0x0                                                        
rem deassert ALE                                                                            
outport $port+0x5 0x1                                                                
inport $port 0x200 -b                                                                        
                                                                                    
rem assert SE#                                                                               
outport $port+0x7 0x1                                                                
rem spare area (16 bytes)  
inport $port 0x10 -b                                                                  
pause 1                                                                                 
rem deassert CE#                                                                            
outport &port+0x2 0x1                                                                
rem Assert WP# Write protect                                                                 
outport &port+0x9 0x1                                                                
pause 2     

!  
