/*****************************************************************************/
/*									  							                                         */
/*---------------------------------------------------------------------------*/
/*                                                                           */
/*  Filename:     8560_Full_RAM_test_32bits_no_printf.c                      */
/*  Description:  DDR SDRAM test for 32-bit operation			     		           */
/*  Subroutine:   void WriteHexAddr(unsigned long address)                   */
/*                void ReportResult(unsigned long fail,unsigned long address)*/
/*                                                                           */
/*---------------------------------------------------------------------------*/
/*                                                                           */
/* Date: 9 Jan 2004							     							                           */
/* Author: Kelvin							     					                            		 */
/*                                                                           */
/*****************************************************************************/

//#include	<stdio.h>

#define		TRIAL_TIME			100			 /* Specify the no. of test time */
#define		CONT


//#define RAM_DEBUG

/*************************/
/*  function prototypes  */
/*************************/
void RAM_copy(int);
void RAM_2copy(int);
void RAM_4copy(int);
void RAM_8copy(int);
void RAM_16copy(int);
void RAM_32copy(int);
void Ram_Write(int);
void Ram_read(int);
void Ram_2Write(int);
void Ram_2read(int);
void Ram_4Write(int);
void Ram_4read(int);
void Ram_8Write(int);
void Ram_8read(int);
void Ram_16Write(int);
void Ram_16read(int);
void Ram_32Write(int);
void Ram_32read(int);
void Ram_TPWrite(int);
void Ram_TPread(int);
int dump_tbu(unsigned int *);
int dump_tbl(unsigned int *);
long long tbget (void);
unsigned int * tbu_tbl;
unsigned long	_test_time_ddr[TRIAL_TIME];	// array holding time needed for each test
unsigned long	MEM_SIZE;
unsigned long	MEM_LOC;
unsigned long	RESERVE_SIZE;
unsigned long	MEM_D;		       /* Memory size of DDR, 48MB*/
unsigned long	MEM_S;		  
unsigned long	_pass = 0;

/**************************************************************************/
/*  main():                                                               */
/*                                                                        */
/*  NOTE: run the RAM test                                                */
/*                                                                        */
/**************************************************************************/
int main(void)
{
   
   	int i, scale = 1, count = 1;
   	unsigned char *led;
   	led = 0xf8000000;
     
   	printf("RAM TEST\n");
   
   	for (i = 0; i < TRIAL_TIME; i++)
   	{
   		_test_time_ddr[i] = 0;
   	}
   	
   	tbu_tbl = malloc(sizeof(unsigned int));

#ifdef RAM_DEBUG
	printf("tbu_tbl is %x\n", tbu_tbl);
#endif
   	
   	i=0;

#ifdef CONT
		while (!tstc())
		{
#endif 
   		i++;
   		count = 1;
   		MEM_SIZE = 0x07000000;
   		MEM_LOC = 0x0000000;
   		RESERVE_SIZE = 0x01000000;
   		MEM_D = 0x01000000;
   		MEM_S = 0x04000000;
   		scale = 0x06000000/(MEM_SIZE - RESERVE_SIZE);
   		*led = 0x7f;
	
			while(count < 2)
			{       
				count = count *2;
		
				RAM_copy(count*scale);
//				RAM_2copy(count*scale);
//				RAM_4copy(count*scale);
				RAM_32copy(count*scale);
				Ram_Write(count*scale);
				Ram_read(count*scale);
//				Ram_2Write(count*scale);
//				Ram_2read(count*scale);
//				Ram_4Write(count*scale);
//				Ram_4read(count*scale);
				Ram_32Write(count*scale);
				Ram_32read(count*scale);			
				Ram_TPWrite(count*scale);
				Ram_TPread(count*scale);			

			} // while loop   

   		count = 1;
   		MEM_SIZE = 0x01004000;
  		 	MEM_LOC = 0x0000000;
   		RESERVE_SIZE = 0x01000000;
   		MEM_D = 0x01000000;
   		MEM_S = 0x01002000;
 		  	scale = 0x06000000/(MEM_SIZE - RESERVE_SIZE);
   		*led = 0xbf;

			while(count < 2)
			{       
				count = count *2;
		
				RAM_copy(count*scale);
//				RAM_2copy(count*scale);
//				RAM_4copy(count*scale);
				RAM_8copy(count*scale);
				RAM_32copy(count*scale);
				Ram_Write(count*scale);
				Ram_read(count*scale);
//				Ram_2Write(count*scale);
//				Ram_2read(count*scale);
//				Ram_4Write(count*scale);
//				Ram_4read(count*scale);
				Ram_8Write(count*scale);
				Ram_8read(count*scale);			
				Ram_32Write(count*scale);
				Ram_32read(count*scale);			

			} // while loop   

  		 	count = 1;
   		MEM_SIZE = 0x01020000;
 	 	 	MEM_LOC = 0x0000000;
 		  	RESERVE_SIZE = 0x01000000;
 		  	MEM_D = 0x01000000;
  		 	MEM_S = 0x01010000;
  		 	scale = 0x06000000/(MEM_SIZE - RESERVE_SIZE);
   		*led = 0xcf;   	
	
			while(count < 2)
			{       
				count = count *2;
		
				RAM_copy(count*scale);
//				RAM_2copy(count*scale);
//				RAM_4copy(count*scale);
				RAM_8copy(count*scale);
				RAM_32copy(count*scale);
				Ram_Write(count*scale);
				Ram_read(count*scale);
//				Ram_2Write(count*scale);
//				Ram_2read(count*scale);
//				Ram_4Write(count*scale);
//				Ram_4read(count*scale);
				Ram_8Write(count*scale);
				Ram_8read(count*scale);			
				Ram_32Write(count*scale);
				Ram_32read(count*scale);			

			} // while loop
   	printf("\nloop count %d\n\n",i);
#ifdef CONT
	}
	/* consume input */
	(void) getc();		
#endif
	return 0;
} /* main end */



int dump_tbu(unsigned int * r3)
{
   asm("mfspr 31, 269");	// TBU
   asm("isync");
   asm("  stw 31, 0(3)");
#ifdef RAM_DEBUG
   printf("SPR 269 contains %x\n", *((unsigned int*) r3));  
#endif
   return *((unsigned int*) r3);
}

int dump_tbl(unsigned int * r3)
{
   asm("mfspr 31, 268");	// TBL
   asm("isync");
   asm("  stw 31, 0(3)");
#ifdef RAM_DEBUG
   printf("SPR 268 contains %x\n", *((unsigned int*) r3));
#endif
   return *((unsigned int*) r3);
	
}


long long tbget (void)
{		
   	unsigned long	timer_H = 0;
   	unsigned long	timer_L = 0;
   	unsigned long long	ticks = 0;		// 64-bit timer holding TBU and TBL
	timer_H = dump_tbu(tbu_tbl);

#ifdef RAM_DEBUG
    printf("Starting time...\n");
    printf("timer_H = %x\n", timer_H);
#endif
   
   	ticks = (unsigned long long)(timer_H);
   	ticks <<= 32;
	timer_L = dump_tbl(tbu_tbl);
#ifdef RAM_DEBUG
    printf("timer_L = %x\n", timer_L);
#endif
   	ticks = ticks | (unsigned long long)(timer_L);	
	return ticks;
}

void RAM_copy(count)
{
    long * pBegin; 
    long * pEnd;
    long * tEnd; 
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	int 	j;

	timer_start = tbget();   

    pBegin = (long *) MEM_D;   
    pEnd   = (long *) MEM_S;   
    tEnd   = (long *) MEM_S;  
   
    for(j=0;j<count;j++) /* copy 48MB data*/
    {
      	pBegin = (long *) MEM_D;   
       	pEnd   = (long *) MEM_S;    
       	*pBegin = *pEnd; 
        for(;pBegin<tEnd;pBegin++,pEnd++) 
        { 
          	*pBegin = *pEnd;   
        } 
	}

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_copy %d KB* %d     \t= %d clk_ticks\n",(MEM_S-MEM_D)/0x400, count, _test_time_ddr[_pass]);
}   

void RAM_2copy(count)
{
    long * pBegin; 
    long * pEnd;
    long * tEnd; 
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	int 	j;

	timer_start = tbget();   

    pBegin = (long *) MEM_D;   
    pEnd   = (long *) MEM_S;   
    tEnd   = (long *) MEM_S;  
   
    for(j=0;j<count;j++) /* copy 48MB data*/
    {
      	pBegin = (long *) MEM_D;   
       	pEnd   = (long *) MEM_S;    
       	*pBegin = *pEnd; 
        for(;pBegin<tEnd;pBegin=pBegin+2,pEnd=pEnd+2) 
        { 
          	*pBegin = *pEnd;   
          	*(pBegin+1) = *(pEnd+1);   
        } 
	}

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_2copy %d KB* %d     \t= %d clk_ticks\n",(MEM_S-MEM_D)/0x400, count, _test_time_ddr[_pass]);
}   

void RAM_4copy(count)
{
    long * pBegin; 
    long * pEnd;
    long * tEnd; 
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	int 	j;

	timer_start = tbget();   

    pBegin = (long *) MEM_D;   
    pEnd   = (long *) MEM_S;   
    tEnd   = (long *) MEM_S;  
   
    for(j=0;j<count;j++) /* copy 48MB data*/
    {
      	pBegin = (long *) MEM_D;   
       	pEnd   = (long *) MEM_S;    
       	*pBegin = *pEnd; 
        for(;pBegin<tEnd;pBegin=pBegin+4,pEnd=pEnd+4) 
        { 
          	*pBegin = *pEnd;   
          	*(pBegin+1) = *(pEnd+1);   
          	*(pBegin+2) = *(pEnd+2);   
          	*(pBegin+3) = *(pEnd+3);   
        } 
	}

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_4copy %d KB* %d     \t= %d clk_ticks\n",(MEM_S-MEM_D)/0x400, count, _test_time_ddr[_pass]);
}   

void RAM_8copy(count)
{
    long * pBegin; 
    long * pEnd;
    long * tEnd; 
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	int 	j;

	timer_start = tbget();   

    pBegin = (long *) MEM_D;   
    pEnd   = (long *) MEM_S;   
    tEnd   = (long *) MEM_S;  
   
    for(j=0;j<count;j++) /* copy 48MB data*/
    {
      	pBegin = (long *) MEM_D;   
       	pEnd   = (long *) MEM_S;    
       	*pBegin = *pEnd; 
        for(;pBegin<tEnd;pBegin=pBegin+8,pEnd=pEnd+8) 
        { 
          	*pBegin = *pEnd;   
          	*(pBegin+1) = *(pEnd+1);   
          	*(pBegin+2) = *(pEnd+2);   
          	*(pBegin+3) = *(pEnd+3);   
          	*(pBegin+4) = *(pEnd+4);   
          	*(pBegin+5) = *(pEnd+5);   
          	*(pBegin+6) = *(pEnd+6);   
          	*(pBegin+7) = *(pEnd+7);   
        } 
	}

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_8copy %d KB* %d     \t= %d clk_ticks\n",(MEM_S-MEM_D)/0x400, count, _test_time_ddr[_pass]);
}   

void RAM_16copy(count)
{
    long * pBegin; 
    long * pEnd;
    long * tEnd; 
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	int 	j;

	timer_start = tbget();   

    pBegin = (long *) MEM_D;   
    pEnd   = (long *) MEM_S;   
    tEnd   = (long *) MEM_S;  
   
    for(j=0;j<count;j++) /* copy 48MB data*/
    {
      	pBegin = (long *) MEM_D;   
       	pEnd   = (long *) MEM_S;    
       	*pBegin = *pEnd; 
        for(;pBegin<tEnd;pBegin=pBegin+16,pEnd=pEnd+16) 
        { 
          	*pBegin = *pEnd;   
          	*(pBegin+1) = *(pEnd+1);   
          	*(pBegin+2) = *(pEnd+2);   
          	*(pBegin+3) = *(pEnd+3);   
          	*(pBegin+4) = *(pEnd+4);   
          	*(pBegin+5) = *(pEnd+5);   
          	*(pBegin+6) = *(pEnd+6);   
          	*(pBegin+7) = *(pEnd+7);   
          	*(pBegin+8) = *(pEnd+8);   
          	*(pBegin+9) = *(pEnd+9);   
          	*(pBegin+10) = *(pEnd+10);   
          	*(pBegin+11) = *(pEnd+11);   
          	*(pBegin+12) = *(pEnd+12);   
          	*(pBegin+13) = *(pEnd+13);   
          	*(pBegin+14) = *(pEnd+14);   
          	*(pBegin+15) = *(pEnd+15);   
        } 
	}

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_16copy %d KB* %d     \t= %d clk_ticks\n",(MEM_S-MEM_D)/0x400, count, _test_time_ddr[_pass]);
}   

void RAM_32copy(count)
{
    long * pBegin; 
    long * pEnd;
    long * tEnd; 
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	int 	j;

	timer_start = tbget();   

    pBegin = (long *) MEM_D;   
    pEnd   = (long *) MEM_S;   
    tEnd   = (long *) MEM_S;  
   
    for(j=0;j<count;j++) /* copy 48MB data*/
    {
      	pBegin = (long *) MEM_D;   
       	pEnd   = (long *) MEM_S;    
       	*pBegin = *pEnd; 
        for(;pBegin<tEnd;pBegin=pBegin+32,pEnd=pEnd+32) 
        { 
          	*pBegin = *pEnd;   
          	*(pBegin+4) = *(pEnd+4);   
          	*(pBegin+1) = *(pEnd+1);   
          	*(pBegin+2) = *(pEnd+2);   
          	*(pBegin+3) = *(pEnd+3);   

          	*(pBegin+8) = *(pEnd+8);   
          	*(pBegin+5) = *(pEnd+5);   
          	*(pBegin+6) = *(pEnd+6);   
          	*(pBegin+7) = *(pEnd+7);   

          	*(pBegin+12) = *(pEnd+12);   
          	*(pBegin+9) = *(pEnd+9);   
          	*(pBegin+10) = *(pEnd+10);   
          	*(pBegin+11) = *(pEnd+11);   

          	*(pBegin+16) = *(pEnd+16);   
          	*(pBegin+13) = *(pEnd+13);   
          	*(pBegin+14) = *(pEnd+14);   
          	*(pBegin+15) = *(pEnd+15);   

          	*(pBegin+20) = *(pEnd+20);   
          	*(pBegin+17) = *(pEnd+17);   
          	*(pBegin+18) = *(pEnd+18);   
          	*(pBegin+19) = *(pEnd+19);   

          	*(pBegin+24) = *(pEnd+24);   
          	*(pBegin+21) = *(pEnd+21);   
          	*(pBegin+22) = *(pEnd+22);   
          	*(pBegin+23) = *(pEnd+23);   

          	*(pBegin+28) = *(pEnd+28);   
          	*(pBegin+25) = *(pEnd+25);   
          	*(pBegin+26) = *(pEnd+26);   
          	*(pBegin+27) = *(pEnd+27);   

          	*(pBegin+31) = *(pEnd+31);   
          	*(pBegin+29) = *(pEnd+29);   
          	*(pBegin+30) = *(pEnd+30);   
        } 
	}

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_32copy %d KB* %d     \t= %d clk_ticks\n",(MEM_S-MEM_D)/0x400, count, _test_time_ddr[_pass]);
}   

void Ram_Write(count)
{
   	unsigned long    *ptr;
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

   	unsigned long 	i;
   	int j;

	timer_start = tbget();   

   	/** write the 0xAAAA pattern **/
   	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);
   	for (j = 0; j<count; j++)
   	{
   		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i++)	// reserved in front
   		{				
			ptr[i] = 0xAAAAAAAA;
   		}
   	}
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
	printf("DDR_write %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void read(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
		asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i++)				
		{
     		asm("  lwz	0,0(12) ");
     		asm("	addi 12,12,0x4");
		}
	}

}

void Ram_read(count)
{
   	unsigned long    *ptr;
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
	read(ptr, count);
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_read %d KB* %d     \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}

void Ram_2Write(count)
{
   	unsigned long    *ptr;
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
   	unsigned long 	i;
   	int j;

	/** write the 0xAAAA pattern **/
	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);
	timer_start = tbget();   
	for (j = 0; j<count; j++)
	{
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+2)	// reserved in front
		{				
			ptr[i] = 0xAAAAAAAA;
			ptr[i+1] = 0xAAAAAAAA;
   		}
   	}
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_2write %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void read2(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
		asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+2)				
		{
     		asm("  lwz	0,0(12) ");
     		asm("  lwz	0,4(12) ");
     		asm("	addi 12,12,0x8");
		}
	}

}

void Ram_2read(count)
{
   	unsigned long    *ptr;
   
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
	read2(ptr, count);
    
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_2read %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}

void Ram_4Write(count)
{
   	unsigned long    *ptr;
    
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

   	unsigned long 	i;
   	int j;

   		/** write the 0xAAAA pattern **/
   		ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

		timer_start = tbget();   

   		for (j = 0; j<count; j++)
   		{
   			for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+4)	// reserved in front
   			{				
				ptr[i] = 0xAAAAAAAA;
				ptr[i+1] = 0xAAAAAAAA;
				ptr[i+2] = 0xAAAAAAAA;
				ptr[i+3] = 0xAAAAAAAA;
   			}
   		}
    	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   		printf("DDR_4write %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void read4(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
		asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+4)				
		{
     		asm("  lwz	0,0(12) ");
     		asm("  lwz	0,4(12) ");
     		asm("  lwz	0,8(12) ");
     		asm("  lwz	0,12(12)");
     		asm("	addi 12,12,0x10");
		}
	}

}

void Ram_4read(count)
{
    unsigned long    *ptr;
       
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
	read4(ptr, count);

    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_4read %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}

void Ram_8Write(count)
{
   	unsigned long    *ptr;
    unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
   	unsigned long long	timer_end = 0;
   	unsigned long 	i;
   	int j;

   	/** write the 0xAAAA pattern **/
   	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
   	for (j = 0; j<count; j++)
   	{
   		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+8)	// reserved in front
   		{				
			ptr[i] = 0xAAAAAAAA;
			ptr[i+1] = 0xAAAAAAAA;
			ptr[i+2] = 0xAAAAAAAA;
			ptr[i+3] = 0xAAAAAAAA;
			ptr[i+4] = 0xAAAAAAAA;
			ptr[i+5] = 0xAAAAAAAA;
			ptr[i+6] = 0xAAAAAAAA;
			ptr[i+7] = 0xAAAAAAAA;
   		}
   	}
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_8write %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void read8(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
	 asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+8)				
		{
	    	asm("  lwz	0,0(12) ");
    		asm("  lwz	0,16(12)");
    		asm("  lwz	0,4(12) ");
    		asm("  lwz	0,8(12) ");
    		asm("  lwz	0,12(12)");
    		asm("  lwz	0,20(12)");
    		asm("  lwz	0,24(12)");
    		asm("  lwz	0,28(12)");     
    		asm("	addi 12,12,0x20");
		}
	}

}


void Ram_8read(int count)
{
   	unsigned long    *ptr;
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
	read8(ptr, count);

	/** check the 0xAA pattern **/
   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_8read %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}

void Ram_16Write(count)
{
   	unsigned long    *ptr;
    unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
   	unsigned long long	timer_end = 0;
   	unsigned long 	i;
   	int j;

   	/** write the 0xAAAA pattern **/
   	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
   	for (j = 0; j<count; j++)
   	{
   		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+16)	// reserved in front
   		{				
			ptr[i] = 0xAAAAAAAA;
			ptr[i+1] = 0xAAAAAAAA;
			ptr[i+2] = 0xAAAAAAAA;
			ptr[i+3] = 0xAAAAAAAA;
			ptr[i+4] = 0xAAAAAAAA;
			ptr[i+5] = 0xAAAAAAAA;
			ptr[i+6] = 0xAAAAAAAA;
			ptr[i+7] = 0xAAAAAAAA;
			ptr[i+8] = 0xAAAAAAAA;
			ptr[i+9] = 0xAAAAAAAA;
			ptr[i+10] = 0xAAAAAAAA;
			ptr[i+11] = 0xAAAAAAAA;
			ptr[i+12] = 0xAAAAAAAA;
			ptr[i+13] = 0xAAAAAAAA;
			ptr[i+14] = 0xAAAAAAAA;
			ptr[i+15] = 0xAAAAAAAA;
   		}
   	}
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_16write %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void Ram_32Write(count)
{
   	unsigned long    *ptr;
    unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
   	unsigned long long	timer_end = 0;
   	unsigned long 	i;
   	int j;

   	/** write the 0xAAAA pattern **/
   	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
   	for (j = 0; j<count; j++)
   	{
   		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+32)	// reserved in front
   		{				
				ptr[i] = 0xAAAAAAAA;
				ptr[i+1] = 0xAAAAAAAA;
				ptr[i+2] = 0xAAAAAAAA;
				ptr[i+3] = 0xAAAAAAAA;
				ptr[i+4] = 0xAAAAAAAA;
				ptr[i+5] = 0xAAAAAAAA;
				ptr[i+6] = 0xAAAAAAAA;
				ptr[i+7] = 0xAAAAAAAA;
				ptr[i+8] = 0xAAAAAAAA;
				ptr[i+9] = 0xAAAAAAAA;
				ptr[i+10] = 0xAAAAAAAA;
				ptr[i+11] = 0xAAAAAAAA;
				ptr[i+12] = 0xAAAAAAAA;
				ptr[i+13] = 0xAAAAAAAA;
				ptr[i+14] = 0xAAAAAAAA;
				ptr[i+15] = 0xAAAAAAAA;
				ptr[i+16] = 0xAAAAAAAA;
				ptr[i+17] = 0xAAAAAAAA;
				ptr[i+18] = 0xAAAAAAAA;
				ptr[i+19] = 0xAAAAAAAA;
				ptr[i+20] = 0xAAAAAAAA;
				ptr[i+21] = 0xAAAAAAAA;
				ptr[i+22] = 0xAAAAAAAA;
				ptr[i+23] = 0xAAAAAAAA;
				ptr[i+24] = 0xAAAAAAAA;
				ptr[i+25] = 0xAAAAAAAA;
				ptr[i+26] = 0xAAAAAAAA;
				ptr[i+27] = 0xAAAAAAAA;
				ptr[i+28] = 0xAAAAAAAA;
				ptr[i+29] = 0xAAAAAAAA;
				ptr[i+30] = 0xAAAAAAAA;
				ptr[i+31] = 0xAAAAAAAA;
   		}
   	}
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_32write %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void writeTP(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
	 asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+256)				
		{
	    	asm("  stw	10,0(12) ");
	    	asm("  stw	10,8(12) ");
    		asm("  stw	10,16(12) ");
    		asm("  stw	10,24(12) ");
    		asm("  stw	10,32(12)");
    		asm("  stw	10,40(12)");
    		asm("  stw	10,48(12)");
    		asm("  stw	10,56(12)");
    		asm("  stw	10,64(12)");     
    		asm("  stw	10,72(12) ");
    		asm("  stw	10,80(12) ");
    		asm("  stw	10,88(12)");
    		asm("  stw	10,96(12)");
    		asm("  stw	10,104(12)");
    		asm("  stw	10,112(12)");
    		asm("  stw	10,120(12)");     
    		asm("	addi 12,12,0x200");
	    	asm("  stw	10,0(12) ");
	    	asm("  stw	10,8(12) ");
    		asm("  stw	10,16(12) ");
    		asm("  stw	10,24(12) ");
    		asm("  stw	10,32(12)");
    		asm("  stw	10,40(12)");
    		asm("  stw	10,48(12)");
    		asm("  stw	10,56(12)");
    		asm("  stw	10,64(12)");     
    		asm("  stw	10,72(12) ");
    		asm("  stw	10,80(12) ");
    		asm("  stw	10,88(12)");
    		asm("  stw	10,96(12)");
    		asm("  stw	10,104(12)");
    		asm("  stw	10,112(12)");
    		asm("  stw	10,120(12)");     
    		asm("	addi 12,12,0x200");
		}
	}

}

void Ram_TPWrite(count)
{
   	unsigned long    *ptr;
    unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL
   	unsigned long long	timer_end = 0;
   	unsigned long 	i;
   	int j;

   	/** write the 0xAAAA pattern **/
   	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   
	writeTP(ptr, count);
    _test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_TPwrite %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);

}

void read16(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
	 asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+16)				
		{
	    	asm("  lwz	0,60(12) ");
	    	asm("  lwz	0,0(12) ");
    		asm("  lwz	0,4(12) ");
    		asm("  lwz	0,8(12) ");
    		asm("  lwz	0,12(12)");
    		asm("  lwz	0,16(12)");
    		asm("  lwz	0,20(12)");
    		asm("  lwz	0,24(12)");
    		asm("  lwz	0,28(12)");     
    		asm("  lwz	0,32(12) ");
    		asm("  lwz	0,36(12) ");
    		asm("  lwz	0,40(12)");
    		asm("  lwz	0,44(12)");
    		asm("  lwz	0,48(12)");
    		asm("  lwz	0,52(12)");
    		asm("  lwz	0,56(12)");     
    		asm("	addi 12,12,0x40");
		}
	}

}


void Ram_16read(count)
{
   	unsigned long    *ptr;
       
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   

	read16(ptr, count);

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_16read %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}

void readTP(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
	 asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+256)				
		{
	    	asm("  lwz	0,0(12) ");
	    	asm("  lwz	0,8(12) ");
    		asm("  lwz	0,16(12) ");
    		asm("  lwz	0,24(12) ");
    		asm("  lwz	0,32(12)");
    		asm("  lwz	0,40(12)");
    		asm("  lwz	0,48(12)");
    		asm("  lwz	0,56(12)");
    		asm("  lwz	0,64(12)");     
    		asm("  lwz	0,72(12) ");
    		asm("  lwz	0,80(12) ");
    		asm("  lwz	0,88(12)");
    		asm("  lwz	0,96(12)");
    		asm("  lwz	0,104(12)");
    		asm("  lwz	0,112(12)");
    		asm("  lwz	0,120(12)");     
    		asm("	addi 12,12,0x200");
	    	asm("  lwz	0,0(12) ");
	    	asm("  lwz	0,8(12) ");
    		asm("  lwz	0,16(12) ");
    		asm("  lwz	0,24(12) ");
    		asm("  lwz	0,32(12)");
    		asm("  lwz	0,40(12)");
    		asm("  lwz	0,48(12)");
    		asm("  lwz	0,56(12)");
    		asm("  lwz	0,64(12)");     
    		asm("  lwz	0,72(12) ");
    		asm("  lwz	0,80(12) ");
    		asm("  lwz	0,88(12)");
    		asm("  lwz	0,96(12)");
    		asm("  lwz	0,104(12)");
    		asm("  lwz	0,112(12)");
    		asm("  lwz	0,120(12)");     
    		asm("	addi 12,12,0x200");
		}
	}

}

void Ram_TPread(count)
{
   	unsigned long    *ptr;
       
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   

	readTP(ptr, count);

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_TPread %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}

void read32(unsigned long* r3, int count)
{
	unsigned long 	i;
  	int j;
	asm(" mr 31,3");

	for(j=0;j<count;j++)
	{
	 asm("	mr 12,31");	
		for (i = 0; i < (MEM_SIZE - RESERVE_SIZE)/4; i=i+32)				
		{
	    	asm("  lwz	0,124(12) ");
	    	asm("  lwz	0,0(12) ");
    		asm("  lwz	0,4(12) ");
    		asm("  lwz	0,8(12) ");
    		asm("  lwz	0,12(12)");
    		asm("  lwz	0,16(12)");
    		asm("  lwz	0,20(12)");
    		asm("  lwz	0,24(12)");
    		asm("  lwz	0,28(12)");     
    		asm("  lwz	0,32(12) ");
    		asm("  lwz	0,36(12) ");
    		asm("  lwz	0,40(12)");
    		asm("  lwz	0,44(12)");
    		asm("  lwz	0,48(12)");
    		asm("  lwz	0,52(12)");
    		asm("  lwz	0,56(12)");     
	    	asm("  lwz	0,60(12) ");
	    	asm("  lwz	0,64(12) ");
    		asm("  lwz	0,68(12) ");
    		asm("  lwz	0,72(12) ");
    		asm("  lwz	0,76(12)");
    		asm("  lwz	0,80(12)");
    		asm("  lwz	0,84(12)");
    		asm("  lwz	0,88(12)");
    		asm("  lwz	0,92(12)");     
    		asm("  lwz	0,96(12) ");
    		asm("  lwz	0,100(12) ");
    		asm("  lwz	0,104(12)");
    		asm("  lwz	0,108(12)");
    		asm("  lwz	0,112(12)");
    		asm("  lwz	0,116(12)");
    		asm("  lwz	0,120(12)");     
    		asm("	addi 12,12,0x80");
		}
	}

}
void Ram_32read(count)
{
   	unsigned long    *ptr;
       
   	unsigned long long	timer_start = 0;		// 64-bit timer holding TBU and TBL

	ptr = (unsigned long *) (MEM_LOC + RESERVE_SIZE);

	timer_start = tbget();   

	read32(ptr, count);

   	_test_time_ddr[_pass] = (unsigned long) (tbget() - timer_start);	// write time duration to array
   	printf("DDR_32read %d KB* %d    \t= %d clk_ticks\n",(MEM_SIZE-RESERVE_SIZE)/0x400, count, _test_time_ddr[_pass]);
   
}
